Abstract: An array substrate includes a plurality of gate lines and a plurality of data lines arranged to cross each other, a plurality of pixel electrodes disposed within areas defined by the gate lines and the data lines, and shielding electrodes provided over the gate lines, wherein the shielding electrodes cover at least edge portions of the gate lines close to the pixel electrodes; at least every three pixel electrodes constitute a pixel unit, and at least one pixel electrode in each pixel unit has a length substantially in an extension direction of the gate lines larger than a length thereof substantially in an extension direction of the data lines; the respective pixel electrodes constituting the same pixel unit are connected with different data lines correspondingly; and there are two data lines in a gap between every two adjacent pixel units.

Abstract: Embodiments of the present disclosure provide an automobile. The automobile includes a housing; and a protection device arranged between the housing and a cabin of the automobile; wherein a buffer cushion is formed by at least a part of the protection device, when a collision of the automobile occurs.

Abstract: An array substrate includes a plurality of gate lines and a plurality of data lines arranged to cross each other, a plurality of pixel electrodes disposed within areas defined by the gate lines and the data lines, and shielding electrodes provided over the gate lines, wherein the shielding electrodes cover at least edge portions of the gate lines close to the pixel electrodes; at least every three pixel electrodes constitute a pixel unit, and at least one pixel electrode in each pixel unit has a length substantially in an extension direction of the gate lines larger than a length thereof substantially in an extension direction of the data lines; the respective pixel electrodes constituting the same pixel unit are connected with different data lines correspondingly; and there are two data lines in a gap between every two adjacent pixel units.

Abstract: Disclosed is method of manufacturing an array substrate, including steps of: forming a thin film transistor on a substrate through a patterning process; and on the substrate on which the thin film transistor has been formed, forming an organic transparent insulation layer including a first via hole and a first transparent electrode layer disposed above the organic transparent insulation layer and including a second via hole through one patterning process, wherein the centers of the first via hole and the second via hole coincide with each other in a thickness direction of the substrate, and a projection of the first via hole on the substrate is within a projection of the second via hole on the substrate.

Abstract: Disclosed is method of manufacturing an array substrate, including steps of: forming a thin film transistor on a substrate through a patterning process; and on the substrate on which the thin film transistor has been formed, forming an organic transparent insulation layer including a first via hole and a first transparent electrode layer disposed above the organic transparent insulation layer and including a second via hole through one patterning process, wherein the centers of the first via hole and the second via hole coincide with each other in a thickness direction of the substrate, and a projection of the first via hole on the substrate is within a projection of the second via hole on the substrate.

Abstract: Disclosed is method of manufacturing an array substrate, including steps of: forming a thin film transistor on a substrate through a patterning process; and on the substrate on which the thin film transistor has been formed, forming an organic transparent insulation layer including a first via hole and a first transparent electrode layer disposed above the organic transparent insulation layer and including a second via hole through one patterning process, wherein the centers of the first via hole and the second via hole coincide with each other in a thickness direction of the substrate, and a projection of the first via hole on the substrate is within a projection of the second via hole on the substrate.

Abstract: Disclosed is method of manufacturing an array substrate, including steps of: forming a thin film transistor on a substrate through a patterning process; and on the substrate on which the thin film transistor has been formed, forming an organic transparent insulation layer including a first via hole and a first transparent electrode layer disposed above the organic transparent insulation layer and including a second via hole through one patterning process, wherein the centers of the first via hole and the second via hole coincide with each other in a thickness direction of the substrate, and a projection of the first via hole on the substrate is within a projection of the second via hole on the substrate.