Patents by Inventor Umang Bharatkumar Thakkar

Umang Bharatkumar Thakkar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiple pBIST controllers
    Patent number: 7805644
    Abstract: A system on a single integrated circuit chip (SoC) includes a plurality of operational circuits to be tested. A plurality of programmable built-in self-test (pBIST) controllers is connected to respective ones of the plurality of operational circuits in a manner that allows the pBIST controllers to test the respective operation circuits in parallel. An interface is connected to each of the plurality of pBIST controllers for connection to an external tester to facilitate programming of each of the plurality of pBIST controllers by the external tester, such that the plurality of pBIST controllers are operable to test the plurality of operational circuits in parallel and report the results of the parallel tests to the external tester, thereby reducing test time.
    Type: Grant
    Filed: December 29, 2007
    Date of Patent: September 28, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Raguram Damodaran, Umang Bharatkumar Thakkar, John David Sayre
  • Multiple pBIST Controllers
    Publication number: 20090172487
    Abstract: A system on a single integrated circuit chip (SoC) includes a plurality of operational circuits to be tested. A plurality of programmable built-in self-test (pBIST) controllers is connected to respective ones of the plurality of operational circuits in a manner that allows the pBIST controllers to test the respective operation circuits in parallel. An interface is connected to each of the plurality of pBIST controllers for connection to an external tester to facilitate programming of each of the plurality of pBIST controllers by the external tester, such that the plurality of pBIST controllers are operable to test the plurality of operational circuits in parallel and report the results of the parallel tests to the external tester, thereby reducing test time.
    Type: Application
    Filed: December 29, 2007
    Publication date: July 2, 2009
    Inventors: Raguram Damodaran, Umang Bharatkumar Thakkar, John David Sayre