Patents by Inventor Umesh Ananthiah

Umesh Ananthiah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9722612
    Abstract: Techniques are provided to permit a programmable logic device (PLD) to comply with a communication standard before the PLD is fully configured. In one example, a method includes programming a first portion of a programmable logic device (PLD) with first configuration data. After the first portion is programmed, the first portion is operated in accordance with a communication standard to exchange data with a host system while a second portion of the PLD is programmed with second configuration data.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: August 1, 2017
    Assignee: Lattice Semiconductor Corporation
    Inventors: Umesh Ananthiah, Tramie Tran, Jamie Freed
  • Publication number: 20140108628
    Abstract: Techniques are provided to permit a programmable logic device (PLD) to comply with a communication standard before the PLD is fully configured. In one example, a method includes programming a first portion of a programmable logic device (PLD) with first configuration data. After the first portion is programmed, the first portion is operated in accordance with a communication standard to exchange data with a host system while a second portion of the PLD is programmed with second configuration data.
    Type: Application
    Filed: May 29, 2013
    Publication date: April 17, 2014
    Inventors: Umesh Ananthiah, Tramie Tran, Jamie Freed
  • Patent number: 7339952
    Abstract: A pointer processing method, in which a pointer value is converted into the corresponding row and column numbers identifying the position of a synchronous payload envelope (SPE) within a data frame. In certain embodiments of the invention, the row number is obtained from the pointer value using a single comparison operation. This is accomplished by using a truncated pointer value to identify the location of the first byte of the SPE envelope to within at most two adjacent rows. The actual row number can then be determined by comparing the full pointer value with a boundary value corresponding to the two identified rows.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: March 4, 2008
    Assignee: Lattice Semiconductor Corporation
    Inventor: Umesh Ananthiah