Abstract: Aspects of the subject technology relate to a system configured to receive a set of network snapshot segments from an output stream of a stream processing service, compile the set of network snapshot segments from the set of messages into a first network snapshot and a second network snapshot, and compare the first network snapshot and the second network snapshot to identify a difference between the first network snapshot and the second network snapshot.

Abstract: A static timing analysis system for finding and reporting timing violations in a digital circuit design prior to circuit fabrication, and associated methods, use exhaustive path-based analysis (EPBA) that is informed by infinite-depth path-based analysis (IPBA) to provide analysis results that are driven full-depth, in contrast to conventional EPBA systems and methods, which can terminate after reaching a maximum depth of analysis as a way of avoiding prolonged or infinite runtimes. The IPBA-driven full-depth EPBA functions for hold-mode as well as setup-mode analysis and achieves reduced pessimism as compared to systems or methods employing IPBA alone, and more complete analysis of designs as compared to systems or methods employing EPBA alone. Improved IPBA signal merging using multidimensional zones for thresholding of signal clustering mitigates the occasional optimism of IPBA.

Abstract: The present embodiments relate to static timing analysis (STA) of circuits. The STA can include determining graph based analysis (GBA) delays of timing paths within the circuit. Path based analysis (PBA) delays of a subset of timing paths can be determined to generate circuit stage credit values for circuit stages in the circuit. The circuit stage credit values can be used to adjust GBA delays of the timing paths. Prediction functions can be utilized to predict or estimate PBA delays of timing paths thereby avoiding the determination of actual PBA delays of the timing paths.

Abstract: A static timing analysis system for finding timing violations in a digital circuit design prior to circuit fabrication, and associated methods, use infinite-depth path-based analysis (IPBA) to achieve reduced pessimism as opposed to systems or methods employing only graph-based analysis (GBA), but with greatly reduced compute time requirements, or greater logic path coverage, versus systems or methods employing conventional or exhaustive path-based analysis. IPBA achieves the improved coverage or compute time results by slotting nodes of a circuit design graph into stages, propagating phases stage-by-stage for all paths in parallel, and merging phases wherever possible during the analysis.

Abstract: A netlist of a multiple voltage circuit design having a plurality of power domains is established, then inter-power domain (IPD) paths traversing the circuit design are identified, according to whether they traverse multi-supply elements, or are clock paths capturing such a path. The netlist is then pruned to disable or remove cells or stages not traversed by an IPD path. A timing analyzer conducts a multi-domain timing analysis of the IPD timing paths in the pruned IPD netlist. Thereby, the circuit design is thoroughly tested according to the applicable ranges of voltage conditions without excessive runtime.

Abstract: The present disclosure relates to a system and method for electronic design automation. Embodiments may include receiving, using at least one processor, an electronic design and determining one or more graph based analysis (“GBA”) violating nodes associated with the electronic design. Embodiments may include identifying a non-covered violating node from the GBA violating nodes and determining a worst timing path through the non-covered violating node. Embodiments may further include invoking a path-based analysis (“PBA”) on the worst timing path and determining if the worst timing path satisfies the PBA analysis.

Abstract: Methods and systems provide setup and generation of SPICE results for a set of timing path(s) and integration of SPICE simulation with static timing analysis (STA) path-based results generation. In an embodiment, a method may select a candidate set of timing paths, perform path based analysis (PBA) on the selected paths, generate SPICE results for the selected paths, and render the PBA and SPICE results in an integrated user interface to facilitate sign off based on annotated constraints and correlation between STA results and SPICE results. Methods and systems of the present disclosure find application in, among other things, timing signoff in an electronic design and verification process.

Abstract: A system and method are provided for generating a structurally-aware timing model for operation of a predetermined circuit design. The timing model is generated to have a plurality of timing arcs representing timing characteristics of the circuit design. Additionally, terminal pairs of the circuit design are evaluated to determine characteristic structural weights for selected paths through the circuit design. The structurally-aware timing model may then be incorporated into a top-level hierarchical circuit design for timing analyses and pessimism removal to arrive at realistic timing characteristics. The structural weights are particularly helpful in an AOCV-type pessimism removal post-process.

Abstract: Methods and systems for I/O resource management that may be employed to manage information management system I/O resources based on modeled and/or monitored I/O resource information, and that may be implemented to optimize information management system I/O resources for the delivery of a variety of data object types, including continuous streaming media data files. The methods and systems may be implemented in an adaptive manner that is capable of optimizing information management system I/O performance by dynamically adjusting information management system I/O operational parameters to meet changing requirements or demands of a dynamic application or information management system I/O environment using a resource management architecture. The resource management architecture may include, for example, a resource manager, a resource model, a storage device workload monitor and/or a storage device capacity monitor.

Abstract: Methods and systems for I/O resource management that may be employed to manage information management system I/O resources based on modeled and/or monitored I/O resource information, and that may be implemented to optimize information management system I/O resources for the delivery of a variety of data object types, including continuous streaming media data files. The methods and systems may be implemented in an adaptive manner that is capable of optimizing information management system I/O performance by dynamically adjusting information management system I/O operational parameters to meet changing requirements or demands of a dynamic application or information management system I/O environment using a resource management architecture. The resource management architecture may include, for example, a resource manager, a resource model, a storage device workload monitor and/or a storage device capacity monitor.

Abstract: Methods and systems for I/O resource management that may be employed to manage information management system I/O resources based on modeled and/or monitored I/O resource information, and that may be implemented to optimize information management system I/O resources for the delivery of a variety of data object types, including continuous streaming media data files. The methods and systems may be implemented in an adaptive manner that is capable of optimizing information management system I/O performance by dynamically adjusting information management system I/O operational parameters to meet changing requirements or demands of a dynamic application or information management system I/O environment using a resource management architecture. The resource management architecture may include, for example, a resource manager, a resource model, a storage device workload monitor and/or a storage device capacity monitor.

Abstract: A generator/dispenser for mono-dispersed aerosol, with droplet size precisely controlled by a stepper motor and a nozzle array having a great number of operational micro-vias, and with fluid volume dosage control. A specified dose is delivered over an accurately controlled interval of time, by decrementing the volume of a fluid reservoir upon each of a specified number of control pulses to a stepper motor, which moves a ball screw linear actuator with great precision on each control pulse. The reservoir is closed at the aerosol delivery position by a nozzle array, which is a thin sheet with myriad micro-via holes. The micro-vias are of the same dimensions and orientation, producing for a medical inhaler the desired micro-droplet volume, for example the volume of a 3-.mu.m diameter droplet from each micro-via, for each pulse.

Abstract: An electric motor driven inline hydraulic apparatus comprises a common housing, a stationary shaft mounted in said housing and spaced pump cylinder block subassemblies that rotate around and are mounted on said shaft. Each subassembly includes a cylinder block and a plurality of circumferentially spaced pistons. The cylinder block subassemblies are positioned such that the pistons of one subassembly extend toward the other subassembly. A common yoke plate is mounted between the two cylinder blocks and bears the two groups of piston shoes, one on each of its two bearing surfaces. Each cylinder block is driven independent of and in direction opposite to the other by an electric motor integrally mounted such that its hollow rotor houses the block and drives it. All components described above are contained in one housing and operate submerged in hydraulic fluid.