Patents by Inventor Umran S. Inan
Umran S. Inan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8633699Abstract: A method and apparatus includes detecting lightning induced electromagnetic pulses and determining a physical property of an underground structure based on the lightning induced electromagnetic pulses. In some embodiments, an apparatus includes an antenna, a low noise amplifier, a processor, cable, and a transmitter. The antenna includes three substantively perpendicular loops of electrical conductors. The processor is configured to condition the amplified signal. The cable is about 100 meters in length and connects the low noise amplifier to the processor. The transmitter is configured to send conditioned data to a data aggregation system.Type: GrantFiled: August 26, 2010Date of Patent: January 21, 2014Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Ivan Richard Linscott, Timothy Chevalier, Umran S. Inan, David Strauss
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Patent number: 8452252Abstract: Techniques for a receiver includes a low noise amplifier, a Q-enhanced bandpass filter on a chip, and an analog to digital converter (ADC) at a sub-sampling speed suitable for an intermediate frequency (IF) signal. In some embodiments, a temperature compensation circuit is included. The receiver has an effective noise level less than 7 dB. In some embodiments a 1-bit ADC is used. In some of these embodiments, one or more switches in the ADC are inverted to cancel charge injection.Type: GrantFiled: May 28, 2010Date of Patent: May 28, 2013Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Carsten Barth, Umran S. Inan, Ivan Richard Linscott
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Patent number: 8184033Abstract: Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-?m CMOS technology (1 ?m=12?6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).Type: GrantFiled: May 12, 2010Date of Patent: May 22, 2012Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Charles Chang-I Wang, Ivan Richard Linscott, Umran S. Inan
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Publication number: 20110169678Abstract: Techniques for an analog-to-digital converter (ADC) using pipeline architecture includes a linearization technique for a spurious-free dynamic range (SFDR) over 80 deciBels. In some embodiments, sampling rates exceed a megahertz. According to a second approach, a switched-capacitor circuit is configured for correct operation in a high radiation environment. In one embodiment, the combination yields high fidelity ADC (>88 deciBel SFDR) while sampling at 5 megahertz sampling rates and consuming <60 milliWatts. Furthermore, even though it is manufactured in a commercial 0.25-?m CMOS technology (1 ?m=12?6 meters), it maintains this performance in harsh radiation environments. Specifically, the stated performance is sustained through a highest tested 2 megarad(Si) total dose, and the ADC displays no latchup up to a highest tested linear energy transfer of 63 million electron Volts square centimeters per milligram at elevated temperature (131 degrees C.) and supply (2.7 Volts, versus 2.5 Volts nominal).Type: ApplicationFiled: May 12, 2010Publication date: July 14, 2011Applicant: Stanford UniversityInventors: Charles Chang-I Wang, Ivan Richard Linscott, Umran S. Inan
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Publication number: 20110095763Abstract: A method and apparatus includes detecting lightning induced electromagnetic pulses and determining a physical property of an underground structure based on the lightning induced electromagnetic pulses. In some embodiments, an apparatus includes an antenna, a low noise amplifier, a processor, cable, and a transmitter. The antenna includes three substantively perpendicular loops of electrical conductors. The processor is configured to condition the amplified signal. The cable is about 100 meters in length and connects the low noise amplifier to the processor. The transmitter is configured to send conditioned data to a data aggregation system.Type: ApplicationFiled: August 26, 2010Publication date: April 28, 2011Applicant: Stanford UniversityInventors: Ivan Richard Linscott, Timothy Chevalier, Umran S. Inan, David Strauss
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Publication number: 20100301928Abstract: Techniques for a receiver includes a low noise amplifier, a Q-enhanced bandpass filter on a chip, and an analog to digital converter (ADC) at a sub-sampling speed suitable for an intermediate frequency (IF) signal. In some embodiments, a temperature compensation circuit is included. The receiver has an effective noise level less than 7 dB. In some embodiments a 1-bit ADC is used. In some of these embodiments, one or more switches in the ADC are inverted to cancel charge injection.Type: ApplicationFiled: May 28, 2010Publication date: December 2, 2010Applicant: Stanford UniversityInventors: Carsten Barth, Umran S. Inan, Ivan Richard Linscott
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Patent number: 7288892Abstract: A cell geometry for a coplanar electrode plasma display panel consisting of two transparent plates, one with parallel sustain electrodes, and the other with address electrodes deposited on their surface. The electrodes are covered with a dielectric film. A protective MgO layer is deposited on the dielectric film adjacent the sustain electrodes. A phosphor layer is deposited on the other dielectric film. The plates are scaled together with their electrodes at right angles and the gap between the plates is filled with an inert gas mixture. The geometry of the sustain electrodes and/or associated dielectric film provides a larger equivalent capacitance at the outer part of the sustain electrodes to provide larger luminous efficiencies.Type: GrantFiled: March 10, 2003Date of Patent: October 30, 2007Assignee: Board of Trustees of the Leland Stanford Junior UniversityInventors: Umran S. Inan, Georgios Veronis
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Publication number: 20030173900Abstract: A cell geometry for a coplanar electrode plasma display panel consisting of two transparent plates, one with parallel sustain electrodes, and the other with address electrodes deposited on their surface. The electrodes are covered with a dielectric film. A protective MgO layer is deposited on the dielectric film adjacent the sustain electrodes. A phosphor layer is deposited on the other dielectric film. The plates are scaled together with their electrodes at right angles and the gap between the plates is filled with an inert gas mixture. The geometry of the sustain electrodes and/or associated dielectric film provides a larger equivalent capacitance at the outer part of the sustain electrodes to provide larger luminous efficiencies.Type: ApplicationFiled: March 10, 2003Publication date: September 18, 2003Inventors: Umran S. Inan, Georgios Veronis