Abstract: The present invention relates generally to a bandwidth tunable mixer and more particularly but not exclusively to a mixer having a bandwidth that is tunable in response to a variation in the duty-cycle of a local oscillator.

Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs adaptive or adjustable equalization circuitry and techniques in the transmitter and/or receiver to enhance the system performance of, for example, a system using the PAM-4 coding.

Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs crosstalk management techniques and structures that increase the system performance in channel communications.

Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs adaptive or adjustable equalization circuitry and techniques in the transmitter and/or receiver to enhance the system performance of, for example, a system using the PAM-4 coding.

Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs adaptive or adjustable equalization circuitry and techniques in the transmitter and/or receiver to enhance the system performance of, for example, a system using the PAM-4 coding.

Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs adaptive or adjustable equalization circuitry and techniques in the transmitter and/or receiver to enhance the system performance of, for example, a system using the PAM-4 coding.

Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs crosstalk management techniques and structures that increase the system performance in channel communications.

Abstract: A circuit, such as a phase-lock loop (PLL), has an oscillator having a plurality of operating curves. During circuit auto-trim operations, the oscillator is automatically trimmed to an appropriate oscillator operating curve for use during normal circuit operations. In particular PLL embodiments, the PLL is a charge-pump PLL having a phase/frequency detector (PFD) that generates error signals based on comparing an input signal and a PLL feedback signal; a charge pump that generates amounts of charge corresponding to the error signals; a loop filter that accumulates the amounts of charge to generate a loop-filter voltage; and a voltage-controlled oscillator (VCO), where the VCO output signal is used to generate the PLL feedback signal. During normal PLL operations, the loop-filter voltage is applied to the voltage input of the VCO.

Abstract: A phase-lock loop (PLL) has an oscillator having a plurality of operating curves. During PLL auto-trim operations, the oscillator is automatically trimmed to an appropriate oscillator operating curve for use during normal PLL operations. In particular embodiments, the PLL is a charge-pump PLL having a phase/frequency detector (PFD) that generates error signals based on comparing an input signal and a PLL feedback signal; a charge pump that generates amounts of charge corresponding to the error signals; a loop filter that accumulates the amounts of charge to generate a loop-filter voltage; and a voltage-controlled oscillator (VCO), where the VCO output signal is used to generate the PLL feedback signal. During normal PLL operations, the loop-filter voltage is applied to the voltage input of the VCO.