Patents by Inventor Uppu Sharath Chandra

Uppu Sharath Chandra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230342272
    Abstract: An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device.
    Type: Application
    Filed: June 28, 2023
    Publication date: October 26, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hung CHANG, Atul KATOCH, Chia-En HUANG, Ching-Wei WU, Donald G. MIKAN, JR., Hao-I YANG, Kao-Cheng LIN, Ming-Chien TSAI, Saman M.I. ADHAM, Tsung-Yung CHANG, Uppu Sharath CHANDRA
  • Patent number: 11734142
    Abstract: An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: August 22, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hung Chang, Atul Katoch, Chia-En Huang, Ching-Wei Wu, Donald G. Mikan, Jr., Hao-I Yang, Kao-Cheng Lin, Ming-Chien Tsai, Saman M. I. Adham, Tsung-Yung Chang, Uppu Sharath Chandra
  • Publication number: 20220171688
    Abstract: An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device.
    Type: Application
    Filed: February 18, 2022
    Publication date: June 2, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hung CHANG, Atul KATOCH, Chia-En HUANG, Ching-Wei WU, Donald G. MIKAN, JR., Hao-I YANG, Kao-Cheng LIN, Ming-Chien TSAI, Saman M.I. ADHAM, Tsung-Yung CHANG, Uppu Sharath CHANDRA
  • Patent number: 11256588
    Abstract: An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: February 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hung Chang, Atul Katoch, Chia-En Huang, Ching-Wei Wu, Donald G. Mikan, Jr., Hao-I Yang, Kao-Cheng Lin, Ming-Chien Tsai, Saman M. I. Adham, Tsung-Yung Chang, Uppu Sharath Chandra
  • Publication number: 20200293417
    Abstract: An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device.
    Type: Application
    Filed: May 29, 2020
    Publication date: September 17, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hung CHANG, Atul KATOCH, Chia-En HUANG, Ching-Wei WU, Donald G. MIKAN, JR., Hao-I YANG, Kao-Cheng LIN, Ming-Chien TSAI, Saman M.I. ADHAM, Tsung-Yung CHANG, Uppu Sharath CHANDRA
  • Patent number: 10705934
    Abstract: An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: July 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hung Chang, Atul Katoch, Chia-En Huang, Ching-Wei Wu, Donald G. Mikan, Jr., Hao-I Yang, Kao-Cheng Lin, Ming-Chien Tsai, Saman M. I. Adham, Tsung-Yung Chang, Uppu Sharath Chandra
  • Publication number: 20190004915
    Abstract: An exemplary testing environment can operate in a testing mode of operation to test whether a memory device or other electronic devices communicatively coupled to the memory device operate as expected or unexpectedly as a result of one or more manufacturing faults. The testing mode of operation includes a shift mode of operation, a capture mode of operation, and/or a scan mode of operation. In the shift mode of operation and the scan mode of operation, the exemplary testing environment delivers a serial input sequence of data to the memory device. In the capture mode of operation, the exemplary testing environment delivers a parallel input sequence of data to the memory device.
    Type: Application
    Filed: September 11, 2017
    Publication date: January 3, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hung CHANG, Atul KATOCH, Chia-En HUANG, Ching-Wei WU, Donald G. MIKAN, JR., Hao-I YANG, Kao-Cheng LIN, Ming-Chien TSAI, Saman M.I ADHAM, Tsung-Yung CHANG, Uppu Sharath CHANDRA
  • Patent number: 8427888
    Abstract: A representative circuit device includes a local control circuit having a level shifter, wherein in response to receipt of a first address signal the level shifter shifts the first address signal from a first voltage level to a second voltage level, providing a level shifted first address signal; and a word-line driver having at least one input for receiving a plurality of address signals, wherein the at least one input includes a first input that is coupled to the local control circuit to receive the level shifted first address signal, and an output that is electrically coupled to a word line of a memory cell array.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: April 23, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ji Lu, Lee-Cheng Hung, Hung-Jen Liao, Hsu-Shun Chen, Hong-Chen Cheng, Chung-Yi Wu, Uppu Sharath Chandra
  • Publication number: 20110194362
    Abstract: A representative circuit device includes a local control circuit having a level shifter, wherein in response to receipt of a first address signal the level shifter shifts the first address signal from a first voltage level to a second voltage level, providing a level shifted first address signal; and a word-line driver having at least one input for receiving a plurality of address signals, wherein the at least one input includes a first input that is coupled to the local control circuit to receive the level shifted first address signal, and an output that is electrically coupled to a word line of a memory cell array.
    Type: Application
    Filed: February 9, 2010
    Publication date: August 11, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Ji LU, Lee-Cheng HUNG, Hung-Jen LIAO, Hsu-Shun CHEN, Hong-Chen CHENG, Chung-Yi Wu, Uppu Sharath CHANDRA