Patents by Inventor Urs H. Mader

Urs H. Mader has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8010724
    Abstract: I2C/SMBus ladders and ladder enabled ICs (devices) to enable daisy-chained I2C/SMBus communication. The devices are particularly useful in monitoring and/or servicing high-voltage battery stacks and other voltage stacks. The devices are powered from a respective voltage increment in the voltage stack, and include level shifting circuitry so as to be operative with an input voltage up to the breakdown voltage of the level shifting circuitry. Various features are disclosed, including but not limited to a unique data line drive, capacitive coupling between devices in a daisy chain with line clamps for circuitry protection and capacitive coupling charge wiping, and clock stretching to accommodate chain latency.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: August 30, 2011
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Jason Allen Wortham, Urs H. Mader, Yi-Chang Hsieh
  • Publication number: 20110082955
    Abstract: I2C/SMBus ladders and ladder enabled ICs (devices) to enable daisy-chained I2C/SMBus communication. The devices are particularly useful in monitoring and/or servicing high-voltage battery stacks and other voltage stacks. The devices are powered from a respective voltage increment in the voltage stack, and include level shifting circuitry so as to be operative with an input voltage up to the breakdown voltage of the level shifting circuitry. Various features are disclosed, including but not limited to a unique data line drive, capacitive coupling between devices in a daisy chain with line clamps for circuitry protection and capacitive coupling charge wiping, and clock stretching to accommodate chain latency.
    Type: Application
    Filed: October 6, 2009
    Publication date: April 7, 2011
    Applicant: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: Jason Allen Wortham, Urs H. Mader, Yi-chang Hsieh
  • Patent number: 7109804
    Abstract: A relaxation oscillator for generating an oscillator output signal having a predetermined frequency. The relaxation oscillator includes an interleaved charge pump for providing a restoring charge to an integrator in response to at least one charge pump control signal. The relaxation oscillator further includes an integrator having an integrator input connected to the current summing node. The integrator is adapted to produce an integrator output signal having the predetermined frequency at an integrator output. A comparator having an input connected to the integrator output is adapted to generate the oscillator output signal having the predetermined frequency in response to the integrator output signal.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: September 19, 2006
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Urs H. Mader, Yvonne Ko, Franco Cocetta, Jeff Kotowski, Xiaoying Yu
  • Patent number: 7091697
    Abstract: A system and method for effectively managing operating power for an electronic device may include a battery pack coupled to the electronic device for supplying operating power to the electronic device. A battery controller may be configured as a single integrated-circuit device to alternately manage the battery pack either in a single-cell implementation or in a dual-cell implementation. The battery controller may include a charge pump device to provide an internal controller power supply for operating the battery controller in the single-cell implementation.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: August 15, 2006
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Urs H. Mader, Hideyuki Sato
  • Patent number: 6169428
    Abstract: A voltage to frequency converter using a charge pump to restore the output voltage of the input integrator. The charge pump implementation allows the voltage to frequency converter's input to sense voltage above and below ground with a single supply using a charge pump, which can provide either a positive charge or a negative charge as the restoring force to the integrator. Inclusion of an interleaved charge pump provides advantages of implementation simplicity and of high performance. The voltage to frequency converter concentrates all offset and leakage errors at the input of the integrator amplifier, which in the preferred embodiment is a chopper stabilized amplifier providing very low offset. The voltage to frequency converter is intended for realization in integrated circuit form, providing very high performance in an integrated circuit having very low power requirements.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: January 2, 2001
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Urs H. Mader
  • Patent number: 5965989
    Abstract: A circuit that senses a current signal in a secondary winding of a transformer by monitoring a current signal in a primary winding of the transformer. The monitored current signal contains an effective current component and a magnetization current component. The magnitude of the effective current signal is related to the magnitude of the current signal in the secondary winding by the turns ratio of the transformer. The magnetization current signal produces flux in the transformer core and does not contribute to producing current in the secondary winding of the transformer. In addition, the magnetization current is 90 degrees out of phase with the effective current signal in the primary winding. The effective current signal in the primary winding is in phase with the voltage signal applied to the primary winding. The invention integrates the monitored current signal over 0 degrees to 180 degrees of the effective current signal waveform.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: October 12, 1999
    Assignee: Micro Linear Corporation
    Inventor: Urs H. Mader
  • Patent number: 5896015
    Abstract: A circuit that forms a square wave pulse train signal wherein each pulse is centered about a zero crossing of a reference sinusoid. A first capacitor is coupled to be charged and discharged at equal rates by a first transconductance amplifier. Upon a first positive zero crossing of the reference sinusoid, the first transconductance amplifier begins charging the first capacitor. Upon the first negative zero crossing, the first transconductance amplifier begins discharging the first capacitor until a first predetermined voltage level is reached. Upon reaching the first predetermined voltage level, the first transconductance amplifier begins charging the first capacitor again. The voltage on the first capacitor is compared by a first comparator to a second predetermined voltage level higher than the first voltage level. The output of the first comparator is a pulse which is centered about a second positive zero voltage crossing of the reference sinusoid.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: April 20, 1999
    Assignee: Micro Linear Corporation
    Inventor: Urs H. Mader
  • Patent number: 5825223
    Abstract: A circuit for forming a substantially periodic signal having a linear relationship between amplitude and time over a portion of its period, wherein a slope in the linear portion is controllable. A transconductance amplifier has a gain which is controllable depending upon a level of biasing current. A capacitor is coupled to an output of the transconductance amplifier wherein a voltage level on the capacitor defines the periodic waveform. Logic signals coupled to inputs to the transconductance amplifier control a direction of current flow from the transconductance amplifier to charge and discharge the capacitor. The biasing current is controllable to control a slope of the periodic waveform. In the preferred embodiment, the invention is used in conjunction with a circuit for forming pulses centered about positive zero crossings of a sinusoidal signal. The biasing current to the transconductance amplifier has two components.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: October 20, 1998
    Assignee: Micro Linear Corporation
    Inventor: Urs H. Mader
  • Patent number: 5818669
    Abstract: A circuit that utilizes a Zener diode to protect elements of a circuit from an over-voltage condition. When a fault occurs, causing an over-voltage condition, the voltage applied to the elements of the circuit is limited by the Zener diode. In addition, the circuit senses the over-voltage condition. Upon sensing the over-voltage condition, the circuit gradually reduces the power applied to that portion of the circuit to a minimum level. If the over-voltage condition persists for a predetermined amount of time, power is shut down to that portion of the circuit until the circuit is re-started. Because the amount of time that an over-voltage condition may occur is limited, the Zener diode may have a lower power rating than would otherwise be required. This is because the power dissipation capabilities of a Zener diode conducting current under a reverse bias are greater when the reverse bias is of a short duration than when the reverse bias is of a long duration.
    Type: Grant
    Filed: July 30, 1996
    Date of Patent: October 6, 1998
    Assignee: Micro Linear Corporation
    Inventor: Urs H. Mader