Patents by Inventor Urupattur C. Sridharan
Urupattur C. Sridharan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9793172Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: October 20, 2016Date of Patent: October 17, 2017Assignee: Mie Fujitsu Semiconductor LimitedInventors: Lance Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Publication number: 20170040225Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: ApplicationFiled: October 20, 2016Publication date: February 9, 2017Inventors: Lance Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 9514940Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: January 20, 2015Date of Patent: December 6, 2016Assignee: Mie Fujitsu Semiconductor LimitedInventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Publication number: 20160307907Abstract: Methods for fabricating semiconductor devices and devices therefrom are provided. A method includes providing a substrate having a semiconducting surface with first and second layers, where the semiconducting surface has a plurality of active regions comprising first and second active regions. In the first active region, the first layer is an undoped layer and the second layer is a highly doped screening layer. The method also includes removing a part of the first layer to reduce a thickness of the substantially undoped layer for at least a portion of the first active region without a corresponding thickness reduction of the first layer in the second active region. The method additionally includes forming semiconductor devices in the plurality of active regions. In the method, the part of the first layer removed is selected based on a threshold voltage adjustment required for the substrate in the portion of the first active region.Type: ApplicationFiled: June 3, 2016Publication date: October 20, 2016Inventors: Scott E. Thompson, Thomas Hoffmann, Lance Scudder, Urupattur C. Sridharan, Dalong Zhao, Pushkar Ranade, Michael Duane, Paul Gregory
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Publication number: 20160268133Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: ApplicationFiled: January 20, 2015Publication date: September 15, 2016Inventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 9391076Abstract: Methods for fabricating semiconductor devices and devices therefrom are provided. A method includes providing a substrate having a semiconducting surface with first and second layers, where the semiconducting surface has a plurality of active regions comprising first and second active regions. In the first active region, the first layer is an undoped layer and the second layer is a highly doped screening layer. The method also includes removing a part of the first layer to reduce a thickness of the substantially undoped layer for at least a portion of the first active region without a corresponding thickness reduction of the first layer in the second active region. The method additionally includes forming semiconductor devices in the plurality of active regions. In the method, the part of the first layer removed is selected based on a threshold voltage adjustment required for the substrate in the portion of the first active region.Type: GrantFiled: December 18, 2014Date of Patent: July 12, 2016Assignee: Mie Fujitsu Semiconductor LimitedInventors: Scott E. Thompson, Thomas Hoffmann, Lance Scudder, Urupattur C. Sridharan, Dalong Zhao, Pushkar Ranade, Michael Duane, Paul Gregory
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Patent number: 8937005Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: October 4, 2013Date of Patent: January 20, 2015Assignee: SuVolta, Inc.Inventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 8778786Abstract: Silicon loss prevention in a substrate during transistor device element manufacture is achieved by limiting a number of photoresist mask and chemical oxide layer stripping opportunities during the fabrication process. This can be achieved through the use of a protective layer that remains on the substrate during formation and stripping of photoresist masks used in identifying the implant areas into the substrate. In addition, undesirable reworking steps due to photoresist mask misalignment are eliminated or otherwise have no effect on consuming silicon from the substrate during fabrication of device elements. In this manner, device elements with the same operating characteristics and performance can be consistently made from lot to lot.Type: GrantFiled: May 29, 2012Date of Patent: July 15, 2014Assignee: SuVolta, Inc.Inventors: Lance Scudder, Pushkar Ranade, Dalong Zhao, Teymur Bakhishev, Urupattur C. Sridharan, Taiji Ema, Toshifumi Mori, Mitsuaki Hori, Junji Oh, Kazushi Fujita, Yasunobu Torii
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Publication number: 20140038386Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: ApplicationFiled: October 4, 2013Publication date: February 6, 2014Applicant: SuVolta, Inc.Inventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 8569156Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: May 16, 2012Date of Patent: October 29, 2013Assignee: SuVolta, Inc.Inventors: Lance Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
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Patent number: 7561009Abstract: The temperature-compensated film bulk acoustic resonator (FBAR) device comprises an FBAR stack that comprises an FBAR characterized by a resonant frequency having a temperature coefficient and a temperature-compensating layer comprising doped silicon dioxide. The FBAR comprises opposed planar electrodes and a piezoelectric element between the electrodes. The piezoelectric element has a temperature coefficient on which the temperature coefficient of the resonant frequency of the FBAR depends at least in part.Type: GrantFiled: November 30, 2005Date of Patent: July 14, 2009Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: John D. Larson, III, John Choy, Donald E. Lee, Kevin J. Grannen, Hongjun Feng, Carrie A. Rogers, Urupattur C. Sridharan
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Publication number: 20030141946Abstract: An apparatus having a thin film bulk acoustic resonator (FBAR) with positively sloped bottom electrode and a method of making the same is disclosed. The resonator has a bottom electrode, a top electrode, and core material. The bottom electrode includes a positively sloped edge. To make the apparatus including the resonator, first, a bottom electrode layer is deposited. Then, the bottom electrode layer is dry etched to fabricate a bottom electrode having a positively sloped edge. Next, a core layer is fabricated above the bottom electrode. Finally, a top electrode is fabricated over the core layer.Type: ApplicationFiled: January 31, 2002Publication date: July 31, 2003Inventors: Richard C. Ruby, Teresa Volcjak, Urupattur C. Sridharan, Kuhn Seo, Allen Chien, Alexia P. Kekoa