Abstract: The present invention provides semiconductor devices and methods for fabricating the same, in which superior dielectric termination of drift regions is accomplished by a plurality of intersecting trenches with intermediate semiconductor islands. Thus, a deep trench arrangement can be achieved without being restricted by the overall width of the isolation structure.

Abstract: The present invention provides semiconductor devices and methods for fabricating the same, in which superior dielectric termination of drift regions is accomplished by a plurality of intersecting trenches with intermediate semiconductor islands. Thus, a deep trench arrangement can be achieved without being restricted by the overall width of the isolation structure.

Abstract: A method for the electrical measurement of the thickness of a semiconductor layer ( 10, 11, 12) is disclosed. Active layers on SOI wafers, EPI layers with inverse conductivity tape and membrane thickness can be measured by use of a test structure which can routinely be measured during a production process. The embodiment of the test structure (A1 to F1) is preferably annular, such that a high degree of symmetry is achieved on propagation of the measuring current and such that no interactions occur with surrounding structures. The diameter of the arrangement can be matched to the corresponding thickness range of the semiconductor layer to be measured using conventional U-I parameter test systems, conventionally applied in semiconductor production. The determination of the layer thickness is achieved by means of two sequential quadrupole measurements at six contact points.