Patents by Inventor Uttkarsh WARDHAN

Uttkarsh WARDHAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230267096
    Abstract: The reliability of a data communication link may be analyzed and otherwise maintained by collecting a two-dimensional array representing a functional data eye, and using a convolutional neural network to determine a score of the functional data eye. The determined score may be compared with a threshold, and an action may be initiated based on the result of the comparison.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 24, 2023
    Inventors: Uttkarsh WARDHAN, Vishal GHORPADE, Sanku MUKHERJEE, Madan KRISHNAPPA, Sanath Sreekana BANGALORE, Pankhuri AGARWAL, Santanu PATTANAYAK
  • Publication number: 20220138613
    Abstract: A method performed by a machine learning system includes generating a set of reward values based on a set of parameter values selected by a machine learning system, each reward value of the set of reward values corresponding to a parameter value of the set of parameter values programmed at a device. The method also includes determining a reward function for maximizing a reward corresponding to a set of parameters of the device based on the set of reward values. The method further includes tuning a parameter of the set of parameters based on the reward function.
    Type: Application
    Filed: October 29, 2020
    Publication date: May 5, 2022
    Inventors: Uttkarsh WARDHAN, Vishal GHORPADE, Sanku MUKHERJEE, Madan KRISHNAPPA, Pankhuri AGARWAL, Sanath Sreekanta BANGALORE, Santanu PATTANAYAK
  • Publication number: 20200293415
    Abstract: Certain aspects of the present disclosure generally relate to memory training. An example method generally includes assigning each of a plurality of data channels of a memory device to at least one processor, performing memory tests, in parallel, on the plurality of data channels by at least in part performing read and write operations on at least two or more of the plurality of data channels in parallel using the at least one processor, and determining a setting for one or more memory interface parameters associated with the memory device relative to a data eye for each of the plurality of data channels determined based on the memory tests.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 17, 2020
    Inventors: Sanku MUKHERJEE, Uttkarsh WARDHAN, Madan KRISHNAPPA
  • Publication number: 20200264229
    Abstract: Aspects of the present disclosure provide techniques for predicting a failure of an integrated circuit, which may include receiving first aging sensor data during an idle state of the integrated circuit; determining a voltage compensation value based on the first aging sensor data; comparing a new voltage value based on the voltage compensation value to a threshold operating voltage; determining the new operating voltage value exceeds the threshold operating voltage; determining a warning state for the integrated circuit; receiving second aging sensor data during the idle state of the integrated circuit; receiving stored aging sensor data from an aging sensor data repository; comparing the second aging sensor data to the stored aging sensor data; determining that the second aging sensor data is inconsistent with the stored aging sensor data; and determining a danger state for the integrated circuit.
    Type: Application
    Filed: February 15, 2019
    Publication date: August 20, 2020
    Inventors: Uttkarsh WARDHAN, Madan M. KRISHNAPPA, Shih-Hsin Jason HU, Min CHEN