Patents by Inventor Utz Herwig Hahn

Utz Herwig Hahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230295807
    Abstract: With the aid of one or more optical sensors, substrates which are faulty or have been incorrectly inserted in a CVD reactor are identified. The one or more optical sensors sense properties of the surfaces of the substrates, for example layer thickness or temperature, before or during a treatment process of the substrates within the CVD reactor housing. The measurement values provided by the sensors can be plotted in the form of a measurement curve, and patterns are obtained from the measurement curve, each pattern corresponding to one of the substrates. The patterns are compared with each other or with a mean calculated from the patterns.
    Type: Application
    Filed: July 20, 2021
    Publication date: September 21, 2023
    Inventors: Utz Herwig HAHN, Martin DAUELSBERG, Thomas SCHMITT
  • Publication number: 20230160062
    Abstract: In a cleaning process for removing parasitic depositions on surfaces of a process chamber of a CVD reactor, a susceptor of the CVD reactor is heated by a heating device, and the susceptor is regulated to a specified temperature or is heated with a constant heat output. Concurrently, an etching gas is supplied to the heated process chamber. The thermal response of at least one object is monitored, in which the thermal response is the temperature of the wide face of a process chamber cover, the wide face facing away from the process chamber. The parasitic depositions influence the emissivity of the surface of the process chamber cover, the emissivity influencing the temperature distribution in the process chamber. The supply of etching gas is terminated when the temperature reaches a comparison value, the temperature changing in response to changes in the surface emissivity during the cleaning process.
    Type: Application
    Filed: March 17, 2021
    Publication date: May 25, 2023
    Inventors: Utz Herwig HAHN, Martin EICKELKAMP, Dirk FAHLE
  • Patent number: 10665609
    Abstract: The present invention is notably directed to an electro-optical device. The latter comprises a layer structure with: a silicon substrate; a buried oxide layer over the silicon substrate; a tapered silicon waveguide core over the buried oxide layer, the silicon waveguide core cladded by a first cladding structure; a bonding layer over the first cladding structure; and a stack of III-V semiconductor gain materials on the bonding layer, the stack of III-V semiconductor gain materials cladded by a second cladding structure. The layer structure is configured to optically couple radiation between the stack of III-V semiconductor gain materials and the tapered silicon waveguide core. The first cladding structure comprises a material having: a refractive index that is larger than 1.54 for said radiation; and a bandgap, which, in energy units, is larger than an average energy of said radiation.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: May 26, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Utz Herwig Hahn, Marc Seifried
  • Patent number: 10447006
    Abstract: The present invention is notably directed to an electro-optical device. This device has a layer structure, which comprises a stack of III-V semiconductor gain materials, an n-doped layer and a p-doped layer. The III-V materials are stacked along a stacking direction z, which is perpendicular to a main plane of the stack. The n-doped layer extends essentially parallel to the main plane of the stack, on one side thereof. The p-doped layer too extends essentially parallel to this main plane, but on another side thereof. A median vertical plane can be defined in the layer structure, which plane is parallel to the stacking direction z and perpendicular to the main plane of the stack. Now, the device further comprises two sets of ohmic contacts, wherein the ohmic contacts of each set are configured for vertical current injection in the stack of III-V semiconductor gain materials.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: October 15, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stefan Abel, Lukas Czornomaz, Jean Fompeyrine, Utz Herwig Hahn, Folkert Horst, Marc Seifried
  • Publication number: 20180240820
    Abstract: The present invention is notably directed to an electro-optical device. The latter comprises a layer structure with: a silicon substrate; a buried oxide layer over the silicon substrate; a tapered silicon waveguide core over the buried oxide layer, the silicon waveguide core cladded by a first cladding structure; a bonding layer over the first cladding structure; and a stack of III-V semiconductor gain materials on the bonding layer, the stack of III-V semiconductor gain materials cladded by a second cladding structure. The layer structure is configured to optically couple radiation between the stack of III-V semiconductor gain materials and the tapered silicon waveguide core. The first cladding structure comprises a material having: a refractive index that is larger than 1.54 for said radiation; and a bandgap, which, in energy units, is larger than an average energy of said radiation.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 23, 2018
    Inventors: Utz Herwig Hahn, Marc Seifried
  • Publication number: 20180241176
    Abstract: The present invention is notably directed to an electro-optical device. This device has a layer structure, which comprises a stack of III-V semiconductor gain materials, an n-doped layer and a p-doped layer. The III-V materials are stacked along a stacking direction z, which is perpendicular to a main plane of the stack. The n-doped layer extends essentially parallel to the main plane of the stack, on one side thereof. The p-doped layer too extends essentially parallel to this main plane, but on another side thereof. A median vertical plane can be defined in the layer structure, which plane is parallel to the stacking direction z and perpendicular to the main plane of the stack. Now, the device further comprises two sets of ohmic contacts, wherein the ohmic contacts of each set are configured for vertical current injection in the stack of III-V semiconductor gain materials.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 23, 2018
    Inventors: Stefan Abel, Lukas Czornomaz, Jean Fompeyrine, Utz Herwig Hahn, Folkert Horst, Marc Seifried
  • Patent number: 9978872
    Abstract: A non-polar, III-Nitride semiconductor fin field-effect transistor (hereafter “finFET”) includes both a fin and a Si(110) silicon substrate, the silicon substrate having a support surface parallel to a Si(110) plane of the silicon substrate. The fin includes a III-Nitride crystalline layer grown along its c-direction, so as to have sidewalls that are parallel to m and a planes of the III-Nitride crystalline layer. The c-direction is parallel to a Si<111> direction of the silicon substrate, such that two opposite ones of said sidewalls are parallel to the support surface of the silicon substrate. Related devices and methods of fabrication are also provided.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: May 22, 2018
    Assignee: International Business Machines Corporation
    Inventors: Utz Herwig Hahn, Heinz Schmid
  • Patent number: 9917171
    Abstract: A device includes an n-doped InP layer and an ohmic contact, in contact with the n-doped InP layer. The ohmic contact includes an annealed stack of at least three, or preferably four alternating layers of Si and Ni, such that: (i) the n-doped InP layer and one of the layers of the stack in contact with the n-doped InP layer are at least partly intermixed; and (ii) any two adjacent layers of the stack are at least partly intermixed. Related fabrication methods are also disclosed.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: March 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Utz Herwig Hahn
  • Publication number: 20180026111
    Abstract: A device includes an n-doped InP layer and an ohmic contact, in contact with the n-doped InP layer. The ohmic contact includes an annealed stack of at least three, or preferably four alternating layers of Si and Ni, such that: (i) the n-doped InP layer and one of the layers of the stack in contact with the n-doped InP layer are at least partly intermixed; and (ii) any two adjacent layers of the stack are at least partly intermixed. Related fabrication methods are also disclosed.
    Type: Application
    Filed: July 21, 2016
    Publication date: January 25, 2018
    Inventor: Utz Herwig Hahn