Patents by Inventor Uzi Hizi

Uzi Hizi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9895533
    Abstract: Embodiments described herein include a controller (22). The controller includes at least one interface (62) that couples the controller to stimulation circuitry (24), which includes a pair of electrodes (26a, 26b), and to measuring circuitry, and further includes controller circuitry (64). While the electrodes are coupled to skin (60) of a subject, the controller circuitry, via the interface, drives the stimulation circuitry to (i) pass a plurality of stimulating pulses (32) between the electrodes, and (ii) pass one or more reference pulses (34) between the electrodes, the reference pulses being different from each of the stimulating pulses. The controller receives, from the measuring circuitry, an impedance between the electrodes that is measured using the reference pulses. In response to the impedance measured using the reference pulses, but not in response to any impedance measured using the stimulating pulses, the controller circuitry controls the stimulation procedure.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: February 20, 2018
    Assignee: THERANICA BIO-ELECTRONICS LTD.
    Inventors: Amnon Harpak, Uzi Hizi
  • Patent number: 9848137
    Abstract: An image sensor includes a pixel array and a plurality of control circuits. The pixel array includes a plurality of sub-arrays arranged in a plurality of rows and columns, each of the plurality of sub-arrays including a plurality of pixels. The plurality of control circuits are coupled to the pixel array, and configured to control exposure of the plurality of sub-arrays. At least a first of the plurality of control circuits is configured to control exposure of a first of the plurality of sub-arrays according to a first set of exposure times. At least a second of the plurality of control circuits is configured to control exposure of a second of the plurality of sub-arrays according to a second set of exposure times. The first set of exposure times is different from the second set of exposure times.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: December 19, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Uzi Hizi, Nathan Henri Levy, Mickey Bahar
  • Patent number: 9843750
    Abstract: Methods of calibrating a linear-logarithmic image sensor pixel include performing a reset of the pixel in advance of establishing a leakage current between a photodiode and a floating diffusion region of the pixel. A first voltage of the floating diffusion region is then read through a source follower and selection transistor, after the leakage is terminated. A step is then performed to transfer charge between the photodiode and the floating diffusion region of the pixel so that a voltage of a cathode of the photodiode is increased. Thereafter, a second voltage of the floating diffusion region is read. The first and second read voltages are then used to perform a calibration operation. These steps may be repeated to establish another leakage current of different duration/magnitude and yield third and fourth read voltages, which support further calibration.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: December 12, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoel Yaffe, Claudio G. Jakobson, Shemi Prazot, Uzi Hizi
  • Patent number: 9774803
    Abstract: At least one example embodiment discloses a method of generating an image using a global shutter image sensor. The method includes accumulating a first plurality of charges during a first exposure time from a first plurality of pixels, accumulating a second plurality of charges during a plurality of second exposure times from a second plurality of pixels, the plurality of second exposure times occurring during the first exposure time and being shorter than the first exposure time and generating the image based on the first plurality of charges and the second plurality of charges.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: September 26, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mickey Bahar, Uzi Hizi
  • Publication number: 20170244914
    Abstract: At least one example embodiment discloses a method of generating an image using a global shutter image sensor. The method includes accumulating a first plurality of charges during a first exposure time from a first plurality of pixels, accumulating a second plurality of charges during a plurality of second exposure times from a second plurality of pixels, the plurality of second exposure times occurring during the first exposure time and being shorter than the first exposure time and generating the image based on the first plurality of charges and the second plurality of charges.
    Type: Application
    Filed: February 18, 2016
    Publication date: August 24, 2017
    Inventors: MICKEY BAHAR, Uzi HIZI
  • Publication number: 20170197077
    Abstract: Embodiments described herein include a controller (22). The controller includes at least one interface (62) that couples the controller to stimulation circuitry (24), which includes a pair of electrodes (26a, 26b), and to measuring circuitry, and further includes controller circuitry (64). While the electrodes are coupled to skin (60) of a subject, the controller circuitry, via the interface, drives the stimulation circuitry to (i) pass a plurality of stimulating pulses (32) between the electrodes, and (ii) pass one or more reference pulses (34) between the electrodes, the reference pulses being different from each of the stimulating pulses. The controller receives, from the measuring circuitry, an impedance between the electrodes that is measured using the reference pulses. In response to the impedance measured using the reference pulses, but not in response to any impedance measured using the stimulating pulses, the controller circuitry controls the stimulation procedure.
    Type: Application
    Filed: January 11, 2016
    Publication date: July 13, 2017
    Inventors: Amnon Harpak, Uzi Hizi
  • Publication number: 20170150076
    Abstract: An image sensor includes a pixel array and a plurality of control circuits. The pixel array includes a plurality of sub-arrays arranged in a plurality of rows and columns, each of the plurality of sub-arrays including a plurality of pixels. The plurality of control circuits are coupled to the pixel array, and configured to control exposure of the plurality of sub-arrays. At least a first of the plurality of control circuits is configured to control exposure of a first of the plurality of sub-arrays according to a first set of exposure times. At least a second of the plurality of control circuits is configured to control exposure of a second of the plurality of sub-arrays according to a second set of exposure times. The first set of exposure times is different from the second set of exposure times.
    Type: Application
    Filed: November 24, 2015
    Publication date: May 25, 2017
    Inventors: Uzi HIZI, Nathan Henri Levy, Mickey Bahar
  • Patent number: 9426395
    Abstract: Methods of performing two point calibration of a linear-logarithmic image sensor pixel include measuring voltages of a floating diffusion region of the pixel after establishing a plurality of unequal sub-threshold currents through a transfer transistor of the pixel. These sub-threshold currents operate to sequentially increase a voltage of the floating diffusion region to respective voltage levels that enable knee-point (KNPT) voltage and logarithmic sensitivity (LOGS) determination. The methods also include depleting a photodiode within the pixel by driving a cathode of the photodiode with a pull-up current in advance of establishing the sub-threshold currents. The method is photocurrent-independent.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: August 23, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Claudio G. Jakobson, Shemi Prazot, Uzi Hizi
  • Publication number: 20160050377
    Abstract: A global shutter pixel has a stacked pixel structure. The pixel includes a sample and readout circuit on a lower substrate and a photodiode and transfer circuit on an upper substrate. The sample and readout circuit is configured to store accumulated charge and output a pixel data signal corresponding to the stored accumulated charge. The photodiode and transfer circuit is configured to accumulate charge in response to incident light, and to transfer the accumulated charge to the sample and readout circuit, the upper substrate being stacked on the lower substrate.
    Type: Application
    Filed: August 12, 2014
    Publication date: February 18, 2016
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Uzi HIZI, Mickey BAHAR, Yoel YAFFE
  • Publication number: 20150281607
    Abstract: Methods of performing two point calibration of a linear-logarithmic image sensor pixel include measuring voltages of a floating diffusion region of the pixel after establishing a plurality of unequal sub-threshold currents through a transfer transistor of the pixel. These sub-threshold currents operate to sequentially increase a voltage of the floating diffusion region to respective voltage levels that enable knee-point (KNPT) voltage and logarithmic sensitivity (LOGS) determination. The methods also include depleting a photodiode within the pixel by driving a cathode of the photodiode with a pull-up current in advance of establishing the sub-threshold currents. The method is photocurrent-independent.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 1, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Claudio G. Jakobson, Shemi Prazot, Uzi Hizi
  • Publication number: 20150281683
    Abstract: Methods of calibrating a linear-logarithmic image sensor pixel include performing a reset of the pixel in advance of establishing a leakage current between a photodiode and a floating diffusion region of the pixel. A first voltage of the floating diffusion region is then read through a source follower and selection transistor, after the leakage is terminated. A step is then performed to transfer charge between the photodiode and the floating diffusion region of the pixel so that a voltage of a cathode of the photodiode is increased. Thereafter, a second voltage of the floating diffusion region is read. The first and second read voltages are then used to perform a calibration operation. These steps may be repeated to establish another leakage current of different duration/magnitude and yield third and fourth read voltages, which support further calibration.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 1, 2015
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yoel Yaffe, Claudio G. Jakobson, Shemi Prazot, Uzi Hizi
  • Patent number: 9100600
    Abstract: An image sensor includes a line driver, which further includes a transfer pulse generating circuit. The transfer pulse generating circuit is configured to determine an integration status of a first group of pixels, and to selectively apply the anti-blooming shutter to the first group of pixels based on the determined integration status of the first group of pixels.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: August 4, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Uzi Hizi
  • Publication number: 20150015747
    Abstract: An image sensor includes a line driver, which further includes a transfer pulse generating circuit. The transfer pulse generating circuit is configured to determine an integration status of a first group of pixels, and to selectively apply the anti-blooming shutter to the first group of pixels based on the determined integration status of the first group of pixels.
    Type: Application
    Filed: July 10, 2013
    Publication date: January 15, 2015
    Inventor: Uzi HIZI
  • Patent number: 8618974
    Abstract: In at least one example embodiment, a counter circuit includes a latch stage configured to generate a latch stage output clock based on a first rising edge of an enable signal, a state of a counter clock at a previous falling edge of the enable signal, and a state of the output clock at the previous falling edge of the enable signal such that the latch stage output clock and the counter clock have a different state if the state of the counter clock at the previous falling edge and the state of the output clock at the previous falling edge are the same and such that the latch stage output clock and the counter clock have a same state if the state of the counter clock at the previous falling edge and the state of the output clock at the previous falling edge are different.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: December 31, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yair Itzhak, Uzi Hizi, Vadim Gelfand
  • Patent number: 8586903
    Abstract: A counter circuit for an analog to digital converter includes: a plurality of counter stages configured to obtain an integer multiple of a digital gain for the analog to digital converter by bypassing at least one of the plurality of counter stages. An analog-to-digital converter includes at least one counter circuit, and an image sensor includes the analog-to-digital converter, which includes the counter circuit.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: November 19, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yair Itzhak, Shy Hamami, Uzi Hizi
  • Publication number: 20120154649
    Abstract: In at least one example embodiment, a counter circuit includes a latch stage configured to generate a latch stage output clock based on a first rising edge of an enable signal, a state of a counter clock at a previous falling edge of the enable signal, and a state of the output clock at the previous falling edge of the enable signal such that the latch stage output clock and the counter clock have a different state if the state of the counter clock at the previous falling edge and the state of the output clock at the previous falling edge are the same and such that the latch stage output clock and the counter clock have a same state if the state of the counter clock at the previous falling edge and the state of the output clock at the previous falling edge are different.
    Type: Application
    Filed: December 20, 2010
    Publication date: June 21, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yair Itzhak, Uzi Hizi, Vadim Gelfand
  • Publication number: 20110176045
    Abstract: A complementary metal-oxide semiconductor (CMOS) image sensor and a pixel data readout method of the same are provided. The CMOS image sensor includes: a first readout line which outputs pixel data from a shared pixel group in an odd row of a column of a pixel array in a Bayer pattern during a horizontal period; and a second readout line which outputs pixel data from a shared pixel group in an even row of the column of the pixel array during the horizontal period, wherein pixel data output to the first and second readout lines during the horizontal period correspond to a basic Bayer pattern and pixels from which pixel data are read out in each column sequentially shifts in a column direction at each horizontal period.
    Type: Application
    Filed: January 21, 2011
    Publication date: July 21, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Chak AHN, Kyung Ho LEE, Young Hwan PARK, Young Chan KIM, Dong-Yoon JANG, Shy HAMAMI, Uzi HIZI, Yuri FRIEDMAN
  • Publication number: 20110121161
    Abstract: A counter circuit for an analog to digital converter includes: a plurality of counter stages configured to obtain an integer multiple of a digital gain for the analog to digital converter by bypassing at least one of the plurality of counter stages. An analog-to-digital converter includes at least one counter circuit, and an image sensor includes the analog-to-digital converter, which includes the counter circuit.
    Type: Application
    Filed: October 19, 2010
    Publication date: May 26, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yair Itzhak, Shy Hamami, Uzi Hizi
  • Publication number: 20110122274
    Abstract: A counter circuit for an analog to digital converter includes: a latch stage configured to generate a latch stage output clock based on a state of an input clock such that the latch stage output clock and the input clock have a same state at start of a reset counting phase, but a same or different state at start of a signal, counting phase depending on the state of the output clock at the end of the reset counting phase.
    Type: Application
    Filed: October 19, 2010
    Publication date: May 26, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yair Itzhak, Shy Hamami, Uzi Hizi