Abstract: A method is described of operating a radio system having a transmitter unit (10) and a receiver unit (11). At the transmitter unit, at least a potion (50) of an address is transmitted repeatedly for a predetermined period of time (T.sub.w), followed by a message. The receiver unit switches from a dormant, low power mode to a receive mode after a period of time in the dormant mode not exceeding the predetermined period of time (T.sub.w). In the receive mode address information is received and compared bit by bit with a predetermined address stored at the receiver unit. The receiver revels to the dormant mode as soon as a negative comparison is made, to a predetermined degree of non-correlation, between address information received and the predetermined address, thereby saving battery power.

Abstract: An antenna is described having a generally elongate radiating part (10) and a reflective plane (11)juxtaposed and generally parallel to the elongate radiating part. The radiating part has a free end (15), a ground connection (13) remote from the free end and a feed connection (16) between the free end and the ground connection. The ground connection is mounted on the reflective plane (11), giving electrical ground connection and mechanical support. A method of manufacture of an antenna is also described involving breaking off an extension portion to suit the required frequency of operation.

Abstract: A method of communications between a master unit and a slave unit of a supervisory control and data acquisition system is provided. The communications protocol has at least two bytes of data where the first byte (100) is an address byte containing address information for addressing the slave unit and the second byte (101) is a control byte containing an expansion bit and two address/type variable bits to be interpreted by the slave according to a rule set. In the rule set, the meaning of certain control bits (107) is related to the state of an expansion bit (103). The expanion bit defines the presence or absence of a third byte (102).

Abstract: An FSK demodulator is provided comprising means for receiving and digitizing an FSK signal (such as a signal comprising two frequencies f1 and f2 in which first and second logic states are represented by first and second periods of different durations). First, second, third and fourth consecutive transitions of the signal are identified and the times of said transitions are identified. A first period between the first and third transitions is calculated, as is a second period between the second and fourth transitions. A change of frequency in the signal is indicated when the first and second periods lie on opposite sides of a first threshold period (.tau.) and no change of frequency is indicated when the first and second periods lie on the same side of the threshold period (.tau.). In a further aspect of the invention, a transition is rejected as illegal when two consecutive transitions occur within a predetermined period of time.