Patents by Inventor Uzodinma Okoroanyanwu

Uzodinma Okoroanyanwu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9195132
    Abstract: A lithography mask structure is provided, including: a substrate; at least one reflective layer over the substrate; and an absorber film stack over the at least one reflective layer, the absorber film stack including a plurality of first film layers of a first material and at least one second film layer of a second material. The second material is different from the first material, and the second film layer(s) is interleaved with the plurality of first film layers. In one embodiment, the total thickness of the absorber film stack is less than 50 nm. In another embodiment, the reflectivity of the absorber film stack is less than 2% for a pre-defined wavelength of EUV light. In a further embodiment, the second film layer(s) prevents the average crystallite size of the first film layers from exceeding the thickness of the first film layers.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: November 24, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Suraj K. Patil, SherJang Singh, Uzodinma Okoroanyanwu, Obert R. Wood, Pawitter J. S. Mangat
  • Publication number: 20150212402
    Abstract: A lithography mask structure is provided, including: a substrate; at least one reflective layer over the substrate; and an absorber film stack over the at least one reflective layer, the absorber film stack including a plurality of first film layers of a first material and at least one second film layer of a second material. The second material is different from the first material, and the second film layer(s) is interleaved with the plurality of first film layers. In one embodiment, the total thickness of the absorber film stack is less than 50 nm. In another embodiment, the reflectivity of the absorber film stack is less than 2% for a pre-defined wavelength of EUV light. In a further embodiment, the second film layer(s) prevents the average crystallite size of the first film layers from exceeding the thickness of the first film layers.
    Type: Application
    Filed: January 30, 2014
    Publication date: July 30, 2015
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Suraj K. PATIL, SherJang SINGH, Uzodinma OKOROANYANWU, Obert R. WOOD, Pawitter J.S. Mangat
  • Patent number: 8852854
    Abstract: According to one exemplary embodiment, a method for forming a photoresist pattern on a semiconductor wafer includes forming a photoresist including an organic polymer matrix on the semiconductor wafer. The method further includes exposing the photoresist to a patterned radiation. The method further includes baking the photoresist after exposing the photoresist to the pattern radiation. The method further includes applying an oxidizing reagent to the photoresist to create the photoresist pattern corresponding to the patterned radiation.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: October 7, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Thomas Wallow, Uzodinma Okoroanyanwu
  • Patent number: 8792161
    Abstract: An optical polarizer positioned before a light source for use in semiconductor wafer lithography including an array of aligned nanotubes. The array of aligned nanotubes cause light emitted from the light source and incident on the array of aligned nanotubes to be converted into polarized light for use in the semiconductor wafer lithography. The amount of polarization can be controlled by a voltage source coupled to the array of aligned nanotubes. Chromogenic material of a light filtering layer can vary the wavelength of the polarized light transmitted through the array of aligned nanotubes.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: July 29, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Bruno M. LaFontaine, Ryoung-Han Kim, Harry J. Levinson, Uzodinma Okoroanyanwu
  • Patent number: 8715912
    Abstract: In one disclosed embodiment, a method for producing a high resolution resist pattern on a semiconductor wafer comprises depositing a blanket layer of material on a semiconductor wafer, forming a resist interaction substrate on the blanket layer of material, forming a resist layer of a pre-determined thickness on the resist interaction substrate, exposing the resist layer to a patterned radiation, and developing the resulting high resolution resist pattern. In one embodiment, patterned radiation is provided by an extreme ultraviolet (EUV) light source. In other embodiments, patterned radiation may be provided by an electron beam, or ion beam, for example. In one embodiment, the resist layer comprises a chemically amplified resist utilizing a photogenerated acid (PGA), and having a sublayer. In other embodiments, the resist layer includes an additive, for example, fullerite. One disclosed embodiment involves use of an ultra-thin resist layer in combination with a gold resist interaction substrate.
    Type: Grant
    Filed: May 21, 2007
    Date of Patent: May 6, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Uzodinma Okoroanyanwu, Thomas Wallow
  • Patent number: 8586269
    Abstract: In one disclosed embodiment, a method for forming a high resolution resist pattern on a semiconductor wafer involves forming a layer of resist comprising, for example a polymer matrix and a catalytic species, over a material layer formed over a semiconductor wafer; exposing the layer of resist to patterned radiation; and applying a magnetic field to the semiconductor wafer during a post exposure bake process. In one embodiment, the patterned radiation is provided by an extreme ultraviolet (EUV) light source. In other embodiments, the source of patterned radiation can be an electron beam, or ion beam, for example. In one embodiment, the polymer matrix is an organic polymer matrix such as, for example, styrene, acrylate, or methacrylate. In one embodiment, the catalytic species can be, for example, an acid, a base, or an oxidizing agent.
    Type: Grant
    Filed: March 22, 2007
    Date of Patent: November 19, 2013
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Uzodinma Okoroanyanwu, Harry J. Levinson, Ryoung-Han Kim, Thomas Wallow
  • Patent number: 8338061
    Abstract: Fluorine-passivated reticles for use in lithography and methods for fabricating and using such reticles are provided. According to one embodiment, a method for performing photolithography comprises placing a fluorine-passivated reticle between an illumination source and a target semiconductor wafer and causing electromagnetic radiation to pass from the illumination source through the fluorine-passivated reticle to the target semiconductor wafer. In another embodiment, a fluorine-passivated reticle comprises a substrate and a patterned fluorine-passivated absorber material layer overlying the substrate. According to another embodiment, a method for fabricating a reticle for use in photolithography comprises providing a substrate and forming a fluorine-passivated absorber material layer overlying the substrate.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: December 25, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Harry J. Levinson, Uzodinma Okoroanyanwu, Anna Tchikoulaeva, Rene Wirtz
  • Patent number: 8044387
    Abstract: Disclosed are semiconductor memory devices containing a plastic substrate and at least one active device supported by the plastic substrate, the active device containing an organic semiconductor material. The semiconductor memory devices containing a plastic substrate may further contain a polymer dielectric and/or a conductive polymer.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: October 25, 2011
    Assignee: Spansion LLC
    Inventors: Matthew S. Buynoski, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Nicholas H. Tripsas
  • Publication number: 20110244377
    Abstract: Fluorine-passivated reticles for use in lithography and methods for fabricating and using such reticles are provided. According to one embodiment, a method for performing photolithography comprises placing a fluorine-passivated reticle between an illumination source and a target semiconductor wafer and causing electromagnetic radiation to pass from the illumination source through the fluorine-passivated reticle to the target semiconductor wafer. In another embodiment, a fluorine-passivated reticle comprises a substrate and a patterned fluorine-passivated absorber material layer overlying the substrate. According to another embodiment, a method for fabricating a reticle for use in photolithography comprises providing a substrate and forming a fluorine-passivated absorber material layer overlying the substrate.
    Type: Application
    Filed: June 10, 2011
    Publication date: October 6, 2011
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Harry J. LEVINSON, Uzodinma Okoroanyanwu, Anna Tchikoulaeva, Rene Wirtz
  • Patent number: 8012673
    Abstract: Disclosed are organic semiconductor devices containing a copolymer layer that contains a polymer dielectric and a semiconducting polymer formed using actinic radiation. As initially formed, the copolymer layer has dielectric properties, but portions may selectively rendered conductive after those portions are exposed to actinic radiation. Also disclosed are methods of making the organic semiconductor devices. Such devices are characterized by light weight and robust reliability.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: September 6, 2011
    Assignee: Spansion LLC
    Inventors: Suzette K. Pangrle, Matthew S. Buynoski, Nicholas H. Tripsas, Uzodinma Okoroanyanwu
  • Patent number: 8003436
    Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: August 23, 2011
    Assignee: Spansion LLC
    Inventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
  • Patent number: 7985513
    Abstract: Fluorine-passivated reticles for use in lithography and methods for fabricating and using such reticles are provided. According to one embodiment, a method for performing photolithography comprises placing a fluorine-passivated reticle between an illumination source and a target semiconductor wafer and causing electromagnetic radiation to pass from the illumination source through the fluorine-passivated reticle to the target semiconductor wafer. In another embodiment, a fluorine-passivated reticle comprises a substrate and a patterned fluorine-passivated absorber material layer overlying the substrate. According to another embodiment, a method for fabricating a reticle for use in photolithography comprises providing a substrate and forming a fluorine-passivated absorber material layer overlying the substrate.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: July 26, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Harry J. Levinson, Uzodinma Okoroanyanwu, Anna Tchikoulaeva, Rene Wirtz
  • Patent number: 7767985
    Abstract: According to one exemplary embodiment, an extreme ultraviolet (EUV) pellicle for use with a lithographic mask comprises a carbon nanotube film. The carbon nanotube EUV pellicle can be mounted on the lithographic mask. The carbon nanotube EUV pellicle protects the lithographic mask from contamination by undesirable particles and also prevents the undesirable particles from forming a focused image on the surface of a semiconductor wafer during fabrication; while advantageously, the carbon nanotube pellicle has a high level of EUV light transmittance.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: August 3, 2010
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Uzodinma Okoroanyanwu, Ryoung-Han Kim
  • Publication number: 20090239155
    Abstract: Fluorine-passivated reticles for use in lithography and methods for fabricating and using such reticles are provided. According to one embodiment, a method for performing photolithography comprises placing a fluorine-passivated reticle between an illumination source and a target semiconductor wafer and causing electromagnetic radiation to pass from the illumination source through the fluorine-passivated reticle to the target semiconductor wafer. In another embodiment, a fluorine-passivated reticle comprises a substrate and a patterned fluorine-passivated absorber material layer overlying the substrate. According to another embodiment, a method for fabricating a reticle for use in photolithography comprises providing a substrate and forming a fluorine-passivated absorber material layer overlying the substrate.
    Type: Application
    Filed: March 18, 2008
    Publication date: September 24, 2009
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Harry J. LEVINSON, Uzodinma OKOROANYANWU, Anna TCHIKOULAEVA, Rene WIRTZ
  • Publication number: 20090081824
    Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
    Type: Application
    Filed: December 3, 2008
    Publication date: March 26, 2009
    Applicant: SPANSION LLC
    Inventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
  • Patent number: 7465956
    Abstract: The present invention provides a multi-layer organic memory device that can operate as a non-volatile memory device having a plurality of stacked and/or parallel memory structures constructed therein. A multi-cell and multi-layer organic memory component can be formed with two or more electrodes having a selectively conductive media between the electrodes forming individual cells, while utilizing a partitioning component to enable stacking of additional memory cells on top of or in association with previously formed cells. Memory stacks can be formed by adding additional layers—respective layers separated by additional partitioning components, wherein multiple stacks can be formed in parallel to provide a high-density memory device.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: December 16, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Nicholas H. Tripsas, Uzodinma Okoroanyanwu, Suzette K. Pangrle, Michael A. VanBuskirk
  • Publication number: 20080292996
    Abstract: In one disclosed embodiment, a method for producing a high resolution resist pattern on a semiconductor wafer comprises depositing a blanket layer of material on a semiconductor wafer, forming a resist interaction substrate on the blanket layer of material, forming a resist layer of a pre-determined thickness on the resist interaction substrate, exposing the resist layer to a patterned radiation, and developing the resulting high resolution resist pattern. In one embodiment, patterned radiation is provided by an extreme ultraviolet (EUV) light source. In other embodiments, patterned radiation may be provided by an electron beam, or ion beam, for example. In one embodiment, the resist layer comprises a chemically amplified resist utilizing a photogenerated acid (PGA), and having a sublayer. In other embodiments, the resist layer includes an additive, for example, fullerite. One disclosed embodiment involves use of an ultra-thin resist layer in combination with a gold resist interaction substrate.
    Type: Application
    Filed: May 21, 2007
    Publication date: November 27, 2008
    Inventors: Uzodinma Okoroanyanwu, Thomas Wallow
  • Publication number: 20080233494
    Abstract: In one disclosed embodiment, a method for forming a high resolution resist pattern on a semiconductor wafer involves forming a layer of resist comprising, for example a polymer matrix and a catalytic species, over a material layer formed over a semiconductor wafer; exposing the layer of resist to patterned radiation; and applying a magnetic field to the semiconductor wafer during a post exposure bake process. In one embodiment, the patterned radiation is provided by an extreme ultraviolet (EUV) light source. In other embodiments, the source of patterned radiation can be an electron beam, or ion beam, for example. In one embodiment, the polymer matrix is an organic polymer matrix such as, for example, styrene, acrylate, or methacrylate. In one embodiment, the catalytic species can be, for example, an acid, a base, or an oxidizing agent.
    Type: Application
    Filed: March 22, 2007
    Publication date: September 25, 2008
    Inventors: Uzodinma Okoroanyanwu, Harry J. Levinson, Ryoung Han Kim, Thomas Wallow
  • Publication number: 20080199813
    Abstract: According to one exemplary embodiment, a method for forming a photoresist pattern on a semiconductor wafer includes forming a photoresist including an organic polymer matrix on the semiconductor wafer. The method further includes exposing the photoresist to a patterned radiation. The method further includes baking the photoresist after exposing the photoresist to the pattern radiation. The method further includes applying an oxidizing reagent to the photoresist to create the photoresist pattern corresponding to the patterned radiation.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 21, 2008
    Inventors: Thomas Wallow, Uzodinma Okoroanyanwu
  • Publication number: 20080198453
    Abstract: According to one exemplary embodiment, an optical polarizer positioned before a light source for use in semiconductor wafer lithography includes an array of aligned nanotubes. The array of aligned nanotubes cause light emitted from the light source and incident on the array of aligned nanotubes to be converted into polarized light for use in the semiconductor wafer lithography. The amount of polarization can be controlled by a voltage source coupled to the array of aligned nanotubes. Chromogenic material of a light filtering layer can vary the wavelength of the polarized light transmitted through the array of aligned nanotubes.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 21, 2008
    Inventors: Bruno M. LaFontaine, Ryoung-Han Kim, Harry J. Levinson, Uzodinma Okoroanyanwu