Patents by Inventor V. M. Saravanan

V. M. Saravanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210263878
    Abstract: A dual-integrated gate-driver with reverse current protection (RCP) fault protection is described. A Universal Serial Bus Type-C (USB-C) controller includes a first terminal, a second terminal, and a dual-gate driver. The dual-gate driver drives a first power field effect transistor (FET) coupled to the first terminal and a second power FET coupled to the second terminal. The first power FET and the second power FET are connected in series between a voltage bus (VBUS_C) terminal of a USB Type-C connector and a voltage supply to deliver power to the VBUS_C terminal. A breakdown voltage of each of the first power FET and the second power FET is less than 20 volts. The dual-gate driver controls the first power FET and the second power FET in response to at least one of a short circuit event or a reverse current event.
    Type: Application
    Filed: June 25, 2020
    Publication date: August 26, 2021
    Applicant: Cypress Semiconductor Corporation
    Inventors: Hemant P. Vispute, Ramakrishna Venigalla, V.M. Saravanan
  • Patent number: 11100034
    Abstract: A dual-integrated gate-driver with reverse current protection (RCP) fault protection is described. A Universal Serial Bus Type-C (USB-C) controller includes a first terminal, a second terminal, and a dual-gate driver. The dual-gate driver drives a first power field effect transistor (FET) coupled to the first terminal and a second power FET coupled to the second terminal. The first power FET and the second power FET are connected in series between a voltage bus (VBUS_C) terminal of a USB Type-C connector and a voltage supply to deliver power to the VBUS_C terminal. A breakdown voltage of each of the first power FET and the second power FET is less than 20 volts. The dual-gate driver controls the first power FET and the second power FET in response to at least one of a short circuit event or a reverse current event.
    Type: Grant
    Filed: June 25, 2020
    Date of Patent: August 24, 2021
    Assignee: Cypress Semiconductor Corporation
    Inventors: Hemant P. Vispute, Ramakrishna Venigalla, V. M. Saravanan