Patents by Inventor V. R. Ranganath

V. R. Ranganath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Java virtual machine hardware for RISC and CISC processors
    Patent number: 7080362
    Abstract: A hardware Java™ accelerator is provided to implement portions of the Java™ virtual machine in hardware in order to accelerate the operation of the system on Java™ bytecodes. The Java™ hardware accelerator preferably includes Java™ bytecode translation into native CPU instructions. The combination of the Java™ hardware accelerator and a CPU provides a embedded solution which results in an inexpensive system to run Java™ programs for use in commercial appliances.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: July 18, 2006
    Assignee: Nazomi Communication, Inc.
    Inventors: Mukesh K. Patel, Jay Kamdar, V. R. Ranganath
  • Java virtual machine hardware for RISC and CISC processors
    Publication number: 20020066083
    Abstract: A hardware Java accelerator is provided to implement portions of the Java virtual machine in hardware in order to accelerate the operation of the system on Java bytecodes. The Java hardware accelerator preferably includes Java bytecode translation into native CPU instructions. The combination of the Java hardware accelerator and a CPU provides a embedded solution which results in an inexpensive system to run Java programs for use in commercial appliances.
    Type: Application
    Filed: August 24, 2001
    Publication date: May 30, 2002
    Inventors: Mukesh K. Patel, Jay Kamdar, V. R. Ranganath
  • Java virtual machine hardware for RISC and CISC processors
    Patent number: 6332215
    Abstract: A hardware Java accelerator is provided to implement portions of the Java virtual machine in hardware in order to accelerate the operation of the system on Java bytecodes. The Java hardware accelerator preferably includes Java bytecode translation into native CPU instructions. The combination of the Java hardware accelerator and a CPU provides a embedded solution which results in an inexpensive system to run Java programs for use in commercial appliances.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: December 18, 2001
    Assignee: Nazomi Communications, Inc.
    Inventors: Mukesh K. Patel, Jay Kamdar, V. R. Ranganath