Patents by Inventor Vadhiraj Sankaranarayanana

Vadhiraj Sankaranarayanana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for providing per channel frequency optimization in a double data rate memory system
    Patent number: 11341037
    Abstract: An information handling system includes a first Dual In-Line Memory Module (DIMM) on a first memory channel of the information handling system, and a second DIMM on a second memory channel of the information handling system. A processor trains the first memory channel to a first speed based upon a first performance level of the first DIMM, trains the second memory channel to a second speed based upon a second performance level of the second DIMM, and allocates a portion of the first DIMM to the application based upon the first speed.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: May 24, 2022
    Assignee: Dell Products L.P.
    Inventors: Stuart Allen Berke, Vadhiraj Sankaranarayanana, Bhyrav M. Mutnury
  • System and Method for Providing Per Channel Frequency Optimization in a Double Data Rate Memory System
    Publication number: 20200167275
    Abstract: An information handling system includes a first Dual In-Line Memory Module (DIMM) on a first memory channel of the information handling system, and a second DIMM on a second memory channel of the information handling system. A processor trains the first memory channel to a first speed based upon a first performance level of the first DIMM, trains the second memory channel to a second speed based upon a second performance level of the second DIMM, and allocates a portion of the first DIMM to the application based upon the first speed.
    Type: Application
    Filed: January 28, 2020
    Publication date: May 28, 2020
    Inventors: Stuart Allen Berke, Vadhiraj Sankaranarayanana, Bhyrav M. Mutnury
  • System and method for providing per channel frequency optimization in a double data rate memory system
    Patent number: 10579517
    Abstract: An information handling system includes a first Dual In-Line Memory Module (DIMM) on a first memory channel of the information handling system, and a second DIMM on a second memory channel of the information handling system. A processor trains the first memory channel to a first speed based upon a first performance level of the first DIMM, trains the second memory channel to a second speed based upon a second performance level of the second DIMM, and allocates a portion of the first DIMM to the application based upon the first speed.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: March 3, 2020
    Assignee: Dell Products, LP
    Inventors: Stuart Allen Berke, Vadhiraj Sankaranarayanana, Bhyrav M. Mutnury
  • System and Method for Providing Per Channel Frequency Optimization in a Double Data Rate Memory System
    Publication number: 20190286554
    Abstract: An information handling system includes a first Dual In-Line Memory Module (DIMM) on a first memory channel of the information handling system, and a second DIMM on a second memory channel of the information handling system. A processor trains the first memory channel to a first speed based upon a first performance level of the first DIMM, trains the second memory channel to a second speed based upon a second performance level of the second DIMM, and allocates a portion of the first DIMM to the application based upon the first speed.
    Type: Application
    Filed: March 19, 2018
    Publication date: September 19, 2019
    Inventors: Stuart Allen Berke, Vadhiraj Sankaranarayanana, Bhyrav M. Mutnury