Patents by Inventor Vadim Tkachev

Vadim Tkachev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10128866
    Abstract: A current mode sigma-delta modulator comprises an input node; a comparator that compares a voltage of the input node to a reference voltage and outputs a comparison result; an integrating capacitor connected to an input of the comparator; and a switched capacitor circuit connected at a first end to the input node, the input of the comparator, and the integrating capacitor, and connected at a second end to an output of the comparator. The current mode sigma-delta modulator is a component of an analog-to-digital converter.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: November 13, 2018
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Vadim Tkachev
  • Publication number: 20170111056
    Abstract: A current mode sigma-delta modulator comprises an input node; a comparator that compares a voltage of the input node to a reference voltage and outputs a comparison result; an integrating capacitor connected to an input of the comparator; and a switched capacitor circuit connected at a first end to the input node, the input of the comparator, and the integrating capacitor, and connected at a second end to an output of the comparator. The current mode sigma-delta modulator is a component of an analog-to-digital converter.
    Type: Application
    Filed: October 16, 2015
    Publication date: April 20, 2017
    Inventor: Vadim Tkachev
  • Patent number: 7477175
    Abstract: A device that includes: (i) an input node, adapted to receive an analog input current; (ii) an integrating capacitor; wherein a first end of the integrating capacitor is connected to the input node; (iii) a quantizer that comprises a data input, a clock input and an output; wherein the data input is connected to the input node, the clock input receives a jittered clock signal and the output controls a first switch in response to a voltage level of the input node; (iv) a fast charge transfer circuit, for transferring to the integrating capacitor a fixed charge if a first switch is closed; wherein the fixed charge is being transferred during a charge transfer period that is substantially shorter than a minimal clock signal phase of the jittered clock signal; and (v) a first switch, connected between the input node and the fast charge transfer circuit.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: January 13, 2009
    Assignee: Advasense Technologies (2004) Ltd
    Inventors: Vadim Tkachev, Vladimir Koifman