Patents by Inventor Vadym Kapinus

Vadym Kapinus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220415780
    Abstract: Dummy gate patterning lines, and integrated circuit structures resulting therefrom, are described. For example, an integrated circuit structure includes a first gate line along a first direction. A second gate line is parallel with the first gate line along the first direction. A third gate line extends between and is continuous with the first gate line and the second gate line along a second direction, the second direction orthogonal to the first direction.
    Type: Application
    Filed: June 23, 2021
    Publication date: December 29, 2022
    Inventors: William HSU, Biswajeet GUHA, Mohit K. HARAN, Vadym KAPINUS, Robert BIGWOOD, Nidhi KHANDELWAL, Henning HAFFNER, Kevin FISCHER
  • Patent number: 10340220
    Abstract: IC device structures including a lateral compound resistor disposed over a surface of a substrate, and fabrication techniques to form such a resistor in conjunction with fabrication of a transistor. Rather than being stacked vertically, a compound resistive trace may include a plurality of resistive materials arranged laterally over a substrate. Along a resistive trace length, a first resistive material is in contact with a sidewall of a second resistive material. A portion of a first resistive material along a centerline of the resistive trace may be replaced with a second resistive material so that the second resistive material is embedded within the first resistive material.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: July 2, 2019
    Assignee: Intel Corporation
    Inventors: Chen-Guan Lee, Vadym Kapinus, Pei-Chi Liu, Joodong Park, Walid M. Hafez, Chia-Hong Jan
  • Publication number: 20190006279
    Abstract: IC device structures including a lateral compound resistor disposed over a surface of a substrate, and fabrication techniques to form such a resistor in conjunction with fabrication of a transistor. Rather than being stacked vertically, a compound resistive trace may include a plurality of resistive materials arranged laterally over a substrate. Along a resistive trace length, a first resistive material is in contact with a sidewall of a second resistive material. A portion of a first resistive material along a centerline of the resistive trace may be replaced with a second resistive material so that the second resistive material is embedded within the first resistive material.
    Type: Application
    Filed: August 26, 2015
    Publication date: January 3, 2019
    Applicant: Intel Corporation
    Inventors: Chen-Guan Lee, Vadym Kapinus, Pei-Chi Liu, Joodong Park, Walid M. Hafez, Chia-Hong Jan