Abstract: A Through Mold Via (TMV) Integrated Circuit (IC) package is provided as a bottom IC package for a TMV Package on Package (POP) configuration. The TMV IC package has an overmold top portion having a substantially flat surface and spacer or standoff features extending upward from the flat surface. The spacer or standoff features are configured to abut the bottom surface of the top POP package during softer reflow in order to maintain a gap of predetermined height between the top and bottom IC packages.

Abstract: A Through Mold Via (TMV) Integrated Circuit (IC) package is provided as a bottom IC package for a TMV Package on Package (POP) configuration. The TMV IC package has an overmold top portion having a substantially flat surface and spacer or standoff features extending upward from the flat surface. The spacer or standoff features are configured to abut the bottom surface of the top POP package during softer reflow in order to maintain a gap of predetermined height between the top and bottom IC packages.

Abstract: A module (20) can include a first substrate (12) comprised of a first material, at least a second substrate (22) comprised of at least a second material, selectively applied solder (14) of a first composition residing between the first substrate and at least the second substrate, and selectively applied solder (16) of at least a second composition residing between the first substrate and at least the second substrate. Preferably, no crack will exist in the module as a result of a reflow process of the solder due to the CTE mismatch between the first and second substrates. The different selectively applied solder compositions can have different melting points and can be solder balls, solder paste, solder preform or any other known form of solder.

Abstract: A substrate (104) has a region of conductor segments (110) and a matrix display driver (106) mounted on it. The matrix display driver is used for creating pixilated images or symbols, while the conductor segments are used for turning on or off iconic elements. An encapsulated electrophoretic display laminate (108) is mounted over both the matrix display driver and the region of conductor segments to form the mixed mode display.

Abstract: A system (200) and method (800) for determining whether a sample object (203) has a color that is within a predetermined range is provided. The system (200) includes a light source (201) capable of projecting lights having different light wavelength spectrum upon the sample object (203). A controller (222) causes the light source (201) to project a first light wavelength spectrum upon the sample object (203), then another, then another, and so forth. While each light is projecting upon the object, a monochromatic image capture device (202) captures an image having luminous intensity information. The luminous intensity information, or a subset thereof selected by an image selection tool (232) is then compared to the statistical range, which is derived from a plurality of images taken of a reference object (403).

Abstract: A system (200) and method (800) for determining whether a sample object (203) has a color that is within a predetermined range is provided. The system (200) includes a light source (201) capable of projecting lights having different light wavelength spectrum upon the sample object (203). A controller (222) causes the light source (201) to project a first light wavelength spectrum upon the sample object (203), then another, then another, and so forth. While each light is projecting upon the object, a monochromatic image capture device (202) captures an image having luminous intensity information. The luminous intensity information, or a subset thereof selected by an image selection tool (232) is then compared to the statistical range, which is derived from a plurality of images taken of a reference object (403).

Abstract: A method (80) of reducing stress between substrates of differing materials includes the steps of applying (82) solder (16) on a first substrate (14), reflowing (84) the solder on the first substrate to form a cladded substrate (30), applying (85) a medium such as flux or solder on a second substrate (42) having a substantially different coefficient of thermal expansion than the first substrate, placing (86) the cladded substrate on the second substrate, and reflowing (88) the cladded substrate and the second substrate such that thermal stress caused by the substantially different coefficient of thermal expansion between the first and second substrates is limited to when a temperature approximately reaches below a solidus temperature of the solder on the first substrate.

Abstract: A substrate (104) has a region of conductor segments (110) and a matrix display driver (106) mounted on it. The matrix display driver is used for creating pixilated images or symbols, while the conductor segments are used for turning on or off iconic elements. An encapsulated electrophoretic display laminate (108) is mounted over both the matrix display driver and the region of conductor segments to form the mixed mode display.

Abstract: An RF shield arrangement (30) includes a first substrate (12) having a first or top ground plane (41), a second substrate (22) having a second or bottom ground plane (42), and a plurality of solder bumped areas (14) coupled between the top ground plane and the bottom ground plane forming at least one radio frequency shielded compartment. The top and bottom ground planes can be placed on or within the respective substrate so long as they serve to form the RF shielding in accordance with the embodiments herein.

Abstract: A populated printed wiring board (PWB) (100) and method of manufacturing the populated PWB are taught. The populated PWB is manufactured by fabricating a PWB (102, 402) with exposed copper pads (302), coating the copper pads with an organic solderability preservative (OSP) (404), depositing a solder paste that includes lead-free solder on the OSP covered copper pads (406), placing components (408) and heating the PWB above a liquidous temperature of the lead-free solder in an air atmosphere (410). The process allows very close spacing of components and component leads while forming reliable solder joints to components that are mechanically stressed and components that have non-negligible planarity or coplanarity tolerances.

Abstract: A method (100) of attaching a shield (52 or 82) to a substrate (40) can include the steps of circumscribing a predetermined area on the substrate with a metallized trace pattern (26), applying (101) solder to the metallized trace pattern, and optionally placing (103) components (22 and 27) on portions of the metallized trace pattern. The method can further include the steps of reflowing (104) the solder to form a selective cladded trace pattern (32 or 62) on a portion of the metallized trace pattern reserved for the shield, placing (108) the shield on the cladded trace pattern, and reflowing (109) the substrate.

Abstract: A method (50) of forming a solder mask on a portion of a module (40) using for example LTCC technology includes the steps of forming (52) a multilayered ceramic substrate (20) with exposed metallization forming solder pads (28 or 31), masking (54 or 56) the solder pads by placing an additional ceramic layer (22 or 32) on the substrate that at least covers at least a portion of periphery of the solder pad using the LTCC process. The method can further include applying (58 or 60) solder (36) to a portion of the solder pad not covered by the solder mask (22) and placing a printed circuit board (34) having a different coefficient of thermal expansion than the multilayer ceramic substrate on the multilayer ceramic substrate to form the module before reflowing. The module can then be reflowed to form the module without cracks.

Abstract: A method (80) of reducing stress between substrates of differing materials includes the steps of applying (82) solder (16) on a first substrate (14), reflowing (84) the solder on the first substrate to form a cladded substrate (30), applying (85) a medium such as flux or solder on a second substrate (42) having a substantially different coefficient of thermal expansion than the first substrate, placing (86) the cladded substrate on the second substrate, and reflowing (88) the cladded substrate and the second substrate such that thermal stress caused by the substantially different coefficient of thermal expansion between the first and second substrates is limited to when a temperature approximately reaches below a solidus temperature of the solder on the first substrate.

Abstract: This invention is to a mixed alloy lead-free solder paste, a method of making the solder paste, and a method of using the solder paste. The solder paste comprises particles of a first alloy and a second alloy, mixed in a flux. The liquidus temperature of the first alloy and the liquidus temperature of the second alloy differ by not greater than about 15° C.

Abstract: A method (100) of attaching a shield (52 or 82) to a substrate (40) can include the steps of circumscribing a predetermined area on the substrate with a metallized trace pattern (26), applying (101) solder to the metallized trace pattern, and optionally placing (103) components (22 and 27) on portions of the metallized trace pattern. The method can further include the steps of reflowing (104) the solder to form a selective cladded trace pattern (32 or 62) on a portion of the metallized trace pattern reserved for the shield, placing (108) the shield on the cladded trace pattern, and reflowing (109) the substrate.

Abstract: A populated printed wiring board (PWB) (100) and method of manufacturing the populated PWB are taught. The populated PWB is manufactured by fabricating a PWB (102, 402) with exposed copper pads (302), coating the copper pads with an organic solderability preservative (OSP) (404), depositing a solder paste that includes lead-free solder on the OSP covered copper pads (406), placing components (408) and heating the PWB above a liquidous temperature of the lead-free solder in an air atmosphere (410). The process allows very close spacing of components and component leads while forming reliable solder joints to components that are mechanically stressed and components that have non-negligible planarity or coplanarity tolerances.

Abstract: A processed printed circuit board (50 or 80) can include a predetermined area on a substrate (40) defined by a metallized trace pattern (26) and solder (32 or 62) applied to the metallized trace pattern to form a dam around the predetermined area. The board can further include an optional electronic component (22) such as a semiconductor die within the predetermined area along with a conformal coating (52 or 82) applied to the predetermined area. A conformal coating (95) can also be applied to a predetermined area where no components lie underneath.

Abstract: A module (20) can include a first substrate (12) comprised of a first material, at least a second substrate (22) comprised of at least a second material, selectively applied solder (14) of a first composition residing between the first substrate and at least the second substrate, and selectively applied solder (16) of at least a second composition residing between the first substrate and at least the second substrate. Preferably, no crack will exist in the module as a result of a reflow process of the solder due to the CTE mismatch between the first and second substrates. The different selectively applied solder compositions can have different melting points and can be solder balls, solder paste, solder preform or any other known form of solder.