Patents by Inventor Vaibhav Gupta

Vaibhav Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10831623
    Abstract: The disclosed computer-implemented method for performing node failovers may include: (1) initiating, during a failover of a first node to a second node, a grace period for the first node and the second node; (2) writing a new lock, indicating an internet protocol (IP) address, to a memory device of the second node, while maintaining: (A) an old lock of the IP address in a memory device of the first node, and (B) locks of nodes other than the first and second nodes; (3) transferring the old lock from the first node to the new lock of the second node, where requests to change the locks of nodes other than the first and second nodes are denied during transferring; and (4) stopping the grace period. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: November 10, 2020
    Assignee: Veritas Technologies LLC
    Inventors: Rajesh Ghanekar, Tushar Shinde, Mukund Agrawal, Sreeharsha Sarabu, Vaibhav Gupta, Sandeep Jakka
  • Publication number: 20200279483
    Abstract: A system and method are disclosed, in which two or more points of a target object from a two-dimensional (2D) image may be “reverse projected” from a 2D plane to a 3D space. The method may comprise receiving a 2D image from a 2D camera, the 2D image including a representation of a physical topography and a target object of a plurality of target objects, the plurality of target objects being associated with a common physical characteristic, the common physical characteristic of the target object being detectable within the 2D image. The method may further comprise determining a position relative to the physical topography of the target object based upon a position of the target object in the image and the common physical characteristic of the target object.
    Type: Application
    Filed: March 1, 2019
    Publication date: September 3, 2020
    Inventors: James Lance Eather, Lev Zelenskiy, Jon Robert Ducrou, Michael John Neville, Vaibhav Gupta
  • Patent number: 10755571
    Abstract: A system and method are disclosed, in which two or more points of a target object from a two-dimensional (2D) image may be “reverse projected” from a 2D plane to a 3D space. The method may comprise receiving a 2D image from a 2D camera, the 2D image including a representation of a physical topography and a target object of a plurality of target objects, the plurality of target objects being associated with a common physical characteristic, the common physical characteristic of the target object being detectable within the 2D image. The method may further comprise determining a position relative to the physical topography of the target object based upon a position of the target object in the image and the common physical characteristic of the target object.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: August 25, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: James Lance Eather, Lev Zelenskiy, Jon Robert Ducrou, Michael John Neville, Vaibhav Gupta
  • Publication number: 20200227618
    Abstract: One or more dielectric barriers, such as, but not limited to, aluminum oxide (Al2O3), is used to isolate and protect super conductive (SC) structures. The SC structures are formed from SC materials, such as, but not limited to, niobium, from other surrounding materials. Using the barriers significantly reduces and/or eliminates the degradation of the superconducting properties of the SC structures during subsequent fabrication steps that employ elevated temperatures. As a result, incorporation of the barriers relaxes the need to use lower temperature fabrication processes and opens up possibilities for use of different more desirable processes and/or materials during subsequent fabrication steps.
    Type: Application
    Filed: January 14, 2019
    Publication date: July 16, 2020
    Inventors: Michael C. HAMILTON, Vaibhav GUPTA, Mark Lee ADAMS
  • Patent number: 8446791
    Abstract: A process-tolerant large-swing sense amplifier with latching capability includes top-array and bottom-array access. The sense amplifier provides improved tolerance to process variation, reduces design complexity, reduces power consumption, and reduces the physical footprint of the circuit. In addition, the sense amplifier provides write-through functionality through the read data bus.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: May 21, 2013
    Assignee: Oracle International Corporation
    Inventors: Ha M. Pham, Jin-Uk Shin, Vaibhav Gupta
  • Publication number: 20120140575
    Abstract: A process-tolerant large-swing sense amplifier with latching capability includes top-array and bottom-array access. The sense amplifier provides improved tolerance to process variation, reduces design complexity, reduces power consumption, and reduces the physical footprint of the circuit. In addition, the sense amplifier provides write-through functionality through the read data bus.
    Type: Application
    Filed: December 3, 2010
    Publication date: June 7, 2012
    Applicant: ORACLE INTERNATIONAL CORPORATION
    Inventors: Ha M. Pham, Jin-Uk Shin, Vaibhav Gupta