Patents by Inventor Vaibhav Ramamoorthy

Vaibhav Ramamoorthy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Programmable chopping architecture to reduce offset in an analog front end
    Patent number: 11770109
    Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: September 26, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: Erhan Hancioglu, Eashwar Thiagarajan, Eric Mann, Harold Kutz, Vaibhav Ramamoorthy, Rajiv Singh, Amsby Richardson, Jr.
  • PROGRAMMABLE CHOPPING ARCHITECTURE TO REDUCE OFFSET IN AN ANALOG FRONT END
    Publication number: 20230055860
    Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
    Type: Application
    Filed: September 1, 2022
    Publication date: February 23, 2023
    Applicant: Cypress Semiconductor Corporation
    Inventors: Erhan Hancioglu, Eashwar Thiagarajan, Eric Mann, Harold Kutz, Vaibhav Ramamoorthy, Rajiv Singh, Amsby Richardson, JR.
  • Programmable chopping architecture to reduce offset in an analog front end
    Patent number: 11437961
    Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: September 6, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: Erhan Hancioglu, Eashwar Thiagarajan, Eric Mann, Harold Kutz, Vaibhav Ramamoorthy, Rajiv Singh, Amsby Richardson, Jr.
  • NOVEL PROGRAMMABLE CHOPPING ARCHITECTURE TO REDUCE OFFSET IN AN ANALOG FRONT END
    Publication number: 20210408986
    Abstract: An integrated circuit can include an amplifier coupled to receive an analog input signal, an anti-aliasing filter (AAF) coupled to an output of the amplifier, a buffer circuit coupled to an output of the AAF, a sigma-delta modulator configured to generate a digital data stream in response to an output of the buffer, and a plurality of chopping circuits nested within one another, including a first pair of chopping circuits having at least the amplifier disposed therebetween and configured to remove offset in the analog input signal, and a second pair of chopping circuit having at least the first pair of chopping circuits disposed therebetween. The amplifier, AAF, sigma-delta modulator, and chopping circuits can be formed with the same integrated circuit substrate. Corresponding methods and systems are also disclosed.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Applicant: Cypress Semiconductor Corporation
    Inventors: Erhan Hancioglu, Eashwar Thiagarajan, Eric Mann, Harold Kutz, Vaibhav Ramamoorthy, Rajiv Singh, Amsby Richardson, JR.