Patents by Inventor Vaibhav Vaidya

Vaibhav Vaidya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190064907
    Abstract: Systems, apparatuses and methods may provide for early pre-charge with respect to peak power events. Application performance may improve by pre-charging a supercap just prior to initiating a system wake up from a qualified system wake-source trigger. Additionally, the pre-charging of the supercap may be controlled by a time defined pre-charge period and may also be controlled by a predetermined threshold voltage.
    Type: Application
    Filed: August 22, 2017
    Publication date: February 28, 2019
    Inventors: Dileep J. Kurian, Ankit Gupta, Akhila M, Tanay Karnik, Vaibhav Vaidya, David Arditti Ilitzky, Christopher Schaef, Sriram Kabisthalam Muthukumar, Harish K. Krishnamurthy, Suhwan Kim
  • Patent number: 10205084
    Abstract: Techniques for harvesting electrical energy from a plurality of harvesters is disclosed. An example energy harvesting system includes a plurality of harvesters and a signal conditioning circuit selectively coupled to an output of each of the plurality of harvesters. The system also includes an energy storage element coupled to the output of the signal conditioning circuit to be charged by the plurality of harvesters through the signal conditioning circuit. The system also includes a controller to discharge a selected harvester to the signal conditioning circuit when an output of the selected harvester triggers a charge collection.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: February 12, 2019
    Assignee: Intel Corporation
    Inventors: Vaibhav Vaidya, Suhwan Kim
  • Publication number: 20190044341
    Abstract: In one embodiment, an energy harvesting system includes multiple-input-multiple-output switched-capacitor (MIMOSC) circuitry comprising a plurality of switched-capacitor circuit units to receive a plurality of direct current (DC) input voltages at respective input terminals of the switched-capacitor circuit unit, combine the received DC input voltages, and provide the combined DC input voltages at an output terminal of the switched-capacitor circuit unit. The energy harvesting system also includes maximum power point tracking (MPPT) circuitry coupled to switches of the switched-capacitor circuit units of the MIMOSC circuitry. The MPPT circuitry is to provide a plurality of switching signals to the switches of the switched-capacitor circuit units. The MIMOSC circuitry is to provide a plurality of DC output voltages to respective loads based on the switching signals from the MPPT circuitry.
    Type: Application
    Filed: March 28, 2018
    Publication date: February 7, 2019
    Inventors: Xiaosen Liu, Khondker Z. Ahmed, Vivek K. De, Nachiket V. Desai, Suhwan Kim, Harish K. Krishnamurthy, Turbo Majumder, Krishnan Ravichandran, Christopher Schaef, Vaibhav A. Vaidya, Sriram R. Vangal
  • Publication number: 20190006939
    Abstract: Embodiments described herein describe operating a master-slave controller. Operating the master-slave controller comprises, based on a determination that the first output voltage value is greater than the second output voltage value, calculating a first duty cycle value and an input voltage value and the second voltage regulator, calculating a second duty cycle value based on the first duty cycle value, and based on a determination that the second output voltage value is greater than or equal to the first output voltage value, calculating the second duty cycle value based on the second output voltage value and the input voltage value and calculating the first duty cycle value based on the second duty cycle value and configuring the first voltage regulator with the first duty cycle value and the second voltage regulator with the second duty cycle value.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Applicant: INTEL CORPORATION
    Inventors: Harish Krishnamurthy, Khondker Ahmed, Vivek De, Nachiket Desai, Suhwan Kim, Xiaosen Liu, Turbo Majumder, Krishnan Ravichandran, Christopher Schaef, Vaibhav Vaidya, Sriram Vangal
  • Publication number: 20190007223
    Abstract: Various embodiments are generally directed to techniques to power encryption circuitry, such as with a power converter, for instance. Some embodiments are particularly directed to a power converter that utilizes one or more capacitors to power encryption circuitry while masking the power signature of the encryption circuitry. In one or more embodiments, for example, a power converter may charge a capacitor with a power source of a computing platform, and then power encryption circuitry with the capacitor to perform a first portion of an encryption operation. In one or more such embodiments, the power converter may recharge the capacitor with the power source after completion of the first portion of the encryption operation, and perform a second portion of the encryption operation.
    Type: Application
    Filed: July 1, 2017
    Publication date: January 3, 2019
    Applicant: INTEL CORPORATION
    Inventors: VAIBHAV VAIDYA, SANU K. MATHEW, SUDHIR K. SATPATHY, RAGHAVAN KUMAR
  • Publication number: 20180375433
    Abstract: Embodiments described herein concern operating a peak-delivered-power (PDP) controller. Operating a PDP includes calculating the new power output value from the output voltage value and the output current value, determining whether the new power output value is greater than the previous power output value to determine whether the voltage regulator is outputting a maximum power output, based on a determination that the new power output value is greater than the previous power output value, providing an instruction to a duty generator to increase a duty cycle of the voltage regulator, based on a determination that the new power output value is not greater than the previous power output value, providing an instruction to the duty generator to decrease the duty cycle of the voltage regulator, and replacing the previous power output value with the new power output value.
    Type: Application
    Filed: June 23, 2017
    Publication date: December 27, 2018
    Applicant: INTEL CORPORATION
    Inventors: Khondker Ahmed, Vivek De, Nachiket Desai, Suhwan Kim, Harish Krishnamurthy, Xiaosen Liu, Turbo Majumder, Krishnan Ravichandran, Christopher Schaef, Vaibhav Vaidya, Sriram Vangal
  • Publication number: 20180309311
    Abstract: An electronic device may include a harvester device to receive an alternative power from an alternative power source. An electronic device may also include a cold-start device to provide an additional power derived from the alternative power source. The harvester device may receive the additional power from the cold-start device, and combine the alternative power and the additional power to at least a specific level.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Inventors: Christopher SCHAEF, Vaibhav VAIDYA, Suhwan KIM, Krishnan RAVICHANDRAN
  • Publication number: 20180267591
    Abstract: The present disclosure provides for the management of power of a NZE IoT device. Managing power can include receiving the one or more asynchronous events from the asynchronous event system, determining if any of the one or more asynchronous events meet a respective charge qualification, generating the power-on command for the power-managed compute system if any of the one or more asynchronous events meet the respective charge qualification, and waiting for a power source to reach a threshold associated with the respective charge qualification if any of the one or more asynchronous events do not meet the respective charge qualification.
    Type: Application
    Filed: March 17, 2017
    Publication date: September 20, 2018
    Applicant: INTEL CORPORATION
    Inventors: Dileep Kurian, Tanay Karnik, David Arditti Ilitzky, Ankit Gupta, Sriram Kabisthalam Muthukumar, Vaibhav Vaidya, Suhwan Kim, Christopher Schaef, Ilya Klochkov
  • Patent number: 10069397
    Abstract: Generally, this disclosure describes an apparatus. The apparatus includes switch controller circuitry. The switch controller circuitry includes dead time logic circuitry to determine an estimated dead time interval between a turn off of a first switch and a turn on of a second switch. The first switch and the second switch are coupled at a switched node. The estimated dead time interval is determined based, at least in part, on a difference between an input voltage, Vin, and a switched voltage, Vsw, detected at the switched node just prior to turning off the first switch, a parasitic capacitance, Cpar, associated with the switched node and a maximum inductor current, IL,max. The difference between Vin and Vsw represents the maximum inductor current.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: September 4, 2018
    Assignee: Intel Corporation
    Inventors: Vaibhav Vaidya, Pavan Kumar, Krishnan Ravichandran, Vivek K. De
  • Patent number: 9997942
    Abstract: In embodiments, apparatuses, methods and systems associated with battery charging are disclosed herein. In various embodiments, a reference current selector may receive a battery voltage sense input and output a reference current level signal, a power point check detector may receive a power supply sense input and output a power point check signal, and a controller coupled to the reference current selector and the power point check detector may receive a battery current sense input and switch a control output based at least in part on the reference current level signal, the battery current sense input, and the power point check signal. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: June 12, 2018
    Assignee: INTEL CORPORATION
    Inventors: Lilly Huang, Suvankar Biswas, Vaibhav Vaidya, Krishnan Ravichandran
  • Patent number: 9958922
    Abstract: Methods and apparatus relating to a low ripple mechanism of mode change in switched capacitor voltage regulators are described. In an embodiment, a mode change of a Switching Capacitor Voltage Regulator (SCVR) is caused based at least in part on a comparison of an output voltage of the SCVR and a reference voltage. The output voltage is sensed based at least in part on a clock signal. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: May 1, 2018
    Assignee: Intel Corporation
    Inventors: George E. Matthew, Rinkle Jain, Vaibhav Vaidya
  • Patent number: 9819266
    Abstract: Generally, this disclosure describes an apparatus. The apparatus includes switch controller circuitry and zero crossing logic circuitry. The switch controller circuitry is to control a conduction state of a high side switch and a low side switch in a DC to DC converter. The zero crossing logic circuitry includes phase comparator circuitry, a first clocking circuitry and a second clocking circuitry. Each clocking circuitry includes one or more delay elements. The zero crossing logic circuitry is to monitor a switch node voltage, Vsw, and to determine whether Vsw is greater than a reference, Vref. The switch controller circuitry is to turn off a low side switch if Vsw is greater than Vref while the low side switch is turned on, Vsw greater than Vref corresponding to a negative inductor current.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: November 14, 2017
    Assignee: INTEL CORPORATION
    Inventors: Vaibhav Vaidya, Vivek K. De, Krishnan Ravichandran
  • Patent number: 9812952
    Abstract: Systems and methods may provide for a transient response apparatus that includes a single stage conversion module having a power input, a power output, and a control input, and a compensation module including a feedback input. The compensation module may be coupled to the power input, the power output and the control input of the single stage conversion module. Additionally, a feedback module may be coupled to the power output of the single stage conversion module and the feedback input of the compensation module. In one example, the feedback module includes a loop controller having a plurality of programmable inputs and an error output, and a modulus unit coupled to the error output of the loop controller and the feedback input of the compensation module.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: November 7, 2017
    Assignee: Intel Corporation
    Inventors: Lilly Huang, Yang-Lin Chen, Vaibhav Vaidya
  • Patent number: 9798367
    Abstract: Methods and apparatus relating to controlling the supply of power to computing devices with dynamically variable energy capacity are described. In one embodiment, logic causes modification to supply of power from a power source to one or more loads in response to a comparison of an output of the power source and a threshold value. The output of the power source may vary over a time period (e.g., oscillating) that causes the one or more loads to become inoperational. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: October 24, 2017
    Assignee: Intel Corporation
    Inventors: Lilly Huang, Wayne L. Proefrock, Krishnan Ravichandran, Bernd Nordhausen, Frank K. Welch, Jr., John G. Tompkins, Vaibhav Vaidya
  • Publication number: 20170288415
    Abstract: Techniques for harvesting electrical energy from a plurality of harvesters is disclosed. An example energy harvesting system includes a plurality of harvesters and a signal conditioning circuit selectively coupled to an output of each of the plurality of harvesters. The system also includes an energy storage element coupled to the output of the signal conditioning circuit to be charged by the plurality of harvesters through the signal conditioning circuit. The system also includes a controller to discharge a selected harvester to the signal conditioning circuit when an output of the selected harvester triggers a charge collection.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 5, 2017
    Applicant: Intel Corporation
    Inventors: Vaibhav Vaidya, Suhwan Kim
  • Publication number: 20170279276
    Abstract: Some embodiments include apparatus and methods for using a switch to couple an inductor to an energy harvester for a time interval to allow charging of the inductor during the time interval, and using a circuit to generate control information for power management. A value of the control information is based on a value of the time interval.
    Type: Application
    Filed: March 25, 2016
    Publication date: September 28, 2017
    Inventors: Sally Safwat Amin, Vaibhav Vaidya, Harish K. Krishnamurthy
  • Publication number: 20170271873
    Abstract: Apparatuses, methods and storage medium associated with deriving power output from an energy harvester are disclosed herein. In embodiments, an apparatus may include one or more processors, devices, and/or circuitry to identify a plurality of times at which an intermediate voltage of a two stage power conversion circuit corresponds to a voltage reference, and ascertain an amount of time between one of the identified times and another one of the identified times. The one or more processors, devices, and/or circuitry may derive a power or current value associated with the second power supply using the amount of time.
    Type: Application
    Filed: March 21, 2016
    Publication date: September 21, 2017
    Inventors: Lilly Huang, Christopher Schaef, Vaibhav Vaidya, Suhwan Kim
  • Publication number: 20170242468
    Abstract: Methods and apparatus relating to a low ripple mechanism of mode change in switched capacitor voltage regulators are described. In an embodiment, a mode change of a Switching Capacitor Voltage Regulator (SCVR) is caused based at least in part on a comparison of an output voltage of the SCVR and a reference voltage. The output voltage is sensed based at least in part on a clock signal. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: May 8, 2017
    Publication date: August 24, 2017
    Applicant: Intel Corporation
    Inventors: George E. Matthew, Rinkle Jain, Vaibhav Vaidya
  • Publication number: 20170187187
    Abstract: A power regulator includes a plurality of harvester switches, each coupled to receive a separate energy source, a plurality of load switches, each coupled to supply power to a separate load, an inductor to store energy received from one or more energy sources and release the energy to supply the power to one or more loads and a controller to control charging of the inductor via activation of one or more of the harvester switches and discharging of the inductor via activation of one or more of the load switches.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Applicant: Intel Corporation
    Inventors: Sally Amin, Sergio Carlo, Harish Krishnamurthy, Christopher Schaef, Vaibhav Vaidya
  • Publication number: 20170187284
    Abstract: Generally, this disclosure describes an apparatus. The apparatus includes switch controller circuitry. The switch controller circuitry includes dead time logic circuitry to determine an estimated dead time interval between a turn off of a first switch and a turn on of a second switch. The first switch and the second switch are coupled at a switched node. The estimated dead time interval is determined based, at least in part, on a difference between an input voltage, Vin, and a switched voltage, Vsw, detected at the switched node just prior to turning off the first switch, a parasitic capacitance, Cpar, associated with the switched node and a maximum inductor current, IL,max. The difference between Vin and Vsw represents the maximum inductor current.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Applicant: Intel Corporation
    Inventors: Vaibhav Vaidya, Pavan Kumar, Krishnan Ravichandran, Vivek K. De