Abstract: Systems, computer-implemented methods and/or computer program products that facilitate management of resources are provided. In one embodiment, a computer-implemented method comprises: employing, by a system operatively coupled to a processor, at least one model to predict respective token needs by a set of processing elements during execution of a workload; and exchanging, by the system, one or more tokens between a subset of the processing elements as a function of the predicted token needs.

Abstract: Systems, computer-implemented methods and/or computer program products that facilitate management of resources are provided. In one embodiment, a computer-implemented method comprises: employing, by a system operatively coupled to a processor, at least one model to predict respective token needs by a set of processing elements during execution of a workload; and exchanging, by the system, one or more tokens between a subset of the processing elements as a function of the predicted token needs.

Abstract: A method, a computer program product, and a system for allocating a variable into storage class memory during compilation of a program. The method includes selecting a variable recorded in a symbol table during compilation and computing a variable size of the variable by analyzing attributes related to the variable. The method further includes computing additional attributes relating to the variable. The method also includes computing a control flow graph and analyzing the control flow graph and the additional attributes to determine an allocation location for the variable. The method further includes allocating the variable into a storage class memory based on the analysis performed.

Abstract: A method, computer program product, and/or system associates a number of tokens with a plurality of frequency domains (for example, cores) of a central processing unit (CPU) computer chip. The number of tokens allotted to the CPU is based on the CPU power budget. Cores are organized as a ring topology. A token pool traverses the ring, picks up excess tokens from cores having excess tokens, and gives the tokens to cores that need additional tokens. Tokens acquired by a core allows the core to increase operating frequency by an increment represented by the tokens. Consequently, power usage is weighted toward heavily loaded cores and away from lightly loaded cores. Overall power usage of the CPU remains within a power budget. The method budgets power optimally to sustain turbo frequencies for longer durations by not allowing control units to increase frequency in absence of any useful high frequency benefiting workload.

Abstract: A method, computer program product, and/or system associates a number of tokens with a plurality of frequency domains (for example, cores) of a central processing unit (CPU) computer chip. The number of tokens allotted to the CPU is based on the CPU power budget. Cores are organized as a ring topology. A token pool traverses the ring, picks up excess tokens from cores having excess tokens, and gives the tokens to cores that need additional tokens. Tokens acquired by a core allows the core to increase operating frequency by an increment represented by the tokens. Consequently, power usage is weighted toward heavily loaded cores and away from lightly loaded cores. Overall power usage of the CPU remains within a power budget. The method budgets power optimally to sustain turbo frequencies for longer durations by not allowing control units to increase frequency in absence of any useful high frequency benefiting workload.

Abstract: Method and apparatus for managing memory includes collocating electronic persistent memory along with a primary memory on a memory module. The electronic persistent memory and the primary memory may communicate via a module local bus comprising a plurality of memory channels. A data migration protocol may be used over a memory channel of the plurality of memory channels to copy data from the electronic persistent memory to the primary memory, and the data may be accessed from the primary memory. The combination of electronic persistent memory and primary memory (e.g. DRAM) in a single memory module with module local bus having a device controller running firmware is one implementation of storage class memory (SCM).

Abstract: A method, a computer program product, and a system for allocating a variable into storage class memory during compilation of a program. The method includes selecting a variable recorded in a symbol table during compilation and computing a variable size of the variable by analyzing attributes related to the variable. The method further includes computing additional attributes relating to the variable. The method also includes computing a control flow graph and analyzing the control flow graph and the additional attributes to determine an allocation location for the variable. The method further includes allocating the variable into a storage class memory based on the analysis performed.

Abstract: A method for utilization profiling of thread specific execution units and scheduling software on a multi-core processor is provided. To perform the method, the multi-core processor profiles a workload received for execution by a core of the multi-core processor and logs an execution unit sensitivity to an operating system with respect to the workload. Further, the multi-core processor utilizes the execution unit sensitivity for subsequent workload scheduling to minimize sharing of hardware threads on the same core between workloads with similar execution unit sensitivities.

Abstract: Method and apparatus for managing memory includes collocating electronic persistent memory along with a primary memory on a memory module. The electronic persistent memory and the primary memory may communicate via a module local bus comprising a plurality of memory channels. A data migration protocol may be used over a memory channel of the plurality of memory channels to copy data from the electronic persistent memory to the primary memory, and the data may be accessed from the primary memory. The combination of electronic persistent memory and primary memory (e.g. DRAM) in a single memory module with module local bus having a device controller running firmware is one implementation of storage class memory (SCM).

Abstract: Adjusting runtime performance includes receiving a first input file of a software application, where the software application utilizes a first software architecture. Embodiments include analyzing the first input file, including identifying dependencies for a secondary platform. Embodiments include identifying dependencies for the first software architecture, and a first set of code transformation rules based on the identified dependencies. Embodiments include generating code, based on the first set of transformation rules, where the runtime profile contains data regarding first characteristics of the first input file, the generated code allowing the first input file to utilize the second software architecture. Embodiments include identifying a second set of code transformation rules based on the identified dependencies.

Abstract: Adjusting runtime performance includes receiving a first input file of a software application, where the software application utilizes a first software architecture. Embodiments include analyzing the first input file, including identifying dependencies for a secondary platform. Embodiments include identifying dependencies for the first software architecture, and a first set of code transformation rules based on the identified dependencies. Embodiments include generating code, based on the first set of transformation rules, where the runtime profile contains data regarding first characteristics of the first input file, the generated code allowing the first input file to utilize the second software architecture. Embodiments include identifying a second set of code transformation rules based on the identified dependencies.

Abstract: A method for utilization profiling of thread specific execution units and scheduling software on a multi-core processor is provided. To perform the method, the multi-core processor profiles a workload received for execution by a core of the multi-core processor and logs an execution unit sensitivity to an operating system with respect to the workload.

Abstract: In an approach to collecting and processing performance metrics, one or more computer processors assign an identifier corresponding to a first workload associated with a first virtual machine. The one or more computer processors record resource consumption data of at least one processor at a performance monitoring interrupt. The one or more computer processors create a relational association of the first workload and the first virtual machine to the resource consumption data of the at least one processor. The one or more computer processors determine if the first workload is complete. Responsive to determining that the first workload is not complete, the one or more computer processors calculate a difference in recorded resource consumption data between the performance monitoring interrupt and a previous performance monitoring interrupt.

Abstract: Systems, computer-implemented methods and/or computer program products that facilitate management of resources are provided. In one embodiment, a computer-implemented method comprises: employing, by a system operatively coupled to a processor, at least one model to predict respective token needs by a set of processing elements during execution of a workload; and exchanging, by the system, one or more tokens between a subset of the processing elements as a function of the predicted token needs.

Abstract: Embodiments of the present invention disclose a method, computer program product, and system for determining statistics corresponding to data transfer operations. In one embodiment, the computer implemented method includes the steps of receiving a request from an input/output (I/O) device to perform a data transfer operation between the I/O device and a memory, generating an entry in an input/output memory management unit (IOMMU) corresponding to the data transfer operation, wherein the entry in the IOMMU includes at least an indication of a processor chip that corresponds to the memory of the data transfer operation, monitoring the data transfer operation between the I/O device and the memory, determining statistics corresponding to the monitored data transfer operation, wherein the determined statistics include at least: the I/O device that performed the data transfer operation, the processor chip that corresponds to the memory of the data transfer operation, and an amount of data transferred.

Abstract: In an approach to collecting and processing performance metrics, one or more computer processors assign an identifier corresponding to a first workload associated with a first virtual machine. The one or more computer processors record resource consumption data of at least one processor at a performance monitoring interrupt. The one or more computer processors create a relational association of the first workload and the first virtual machine to the resource consumption data of the at least one processor. The one or more computer processors determine if the first workload is complete. Responsive to determining that the first workload is not complete, the one or more computer processors calculate a difference in recorded resource consumption data between the performance monitoring interrupt and a previous performance monitoring interrupt.

Abstract: Disclosed aspects relate to memory affinity management in a shared pool of configurable computing resources that utilizes non-uniform memory access (NUMA). An access relationship is monitored between a set of hardware memory components and a set of software assets. A set of memory affinity data is stored. The set of memory affinity data indicates the access relationship between the set of software assets and the set of hardware memory components. Using the set of memory affinity data, a NUMA utilization configuration with respect to the set of software assets is determined. Based on the NUMA utilization configuration, a set of accesses pertaining to the set of software assets and the set of hardware memory components is executed.

Abstract: In an approach to collecting and processing performance metrics, one or more computer processors assign an identifier corresponding to a first workload associated with a first virtual machine. The one or more computer processors record resource consumption data of at least one processor at a performance monitoring interrupt. The one or more computer processors create a relational association of the first workload and the first virtual machine to the resource consumption data of the at least one processor. The one or more computer processors determine if the first workload is complete. Responsive to determining that the first workload is not complete, the one or more computer processors calculate a difference in recorded resource consumption data between the performance monitoring interrupt and a previous performance monitoring interrupt.

Abstract: Disclosed aspects relate to memory affinity management in a shared pool of configurable computing resources that utilizes non-uniform memory access (NUMA). An access relationship is monitored between a set of hardware memory components and a set of software assets. A set of memory affinity data is stored. The set of memory affinity data indicates the access relationship between the set of software assets and the set of hardware memory components. Using the set of memory affinity data, a NUMA utilization configuration with respect to the set of software assets is determined. Based on the NUMA utilization configuration, a set of accesses pertaining to the set of software assets and the set of hardware memory components is executed.

Abstract: Disclosed aspects relate to memory affinity management in a shared pool of configurable computing resources that utilizes non-uniform memory access (NUMA). An access relationship is monitored between a set of hardware memory components and a set of software assets. A set of memory affinity data is stored. The set of memory affinity data indicates the access relationship between the set of software assets and the set of hardware memory components. Using the set of memory affinity data, a NUMA utilization configuration with respect to the set of software assets is determined. Based on the NUMA utilization configuration, a set of accesses pertaining to the set of software assets and the set of hardware memory components is executed.