Abstract: A method and apparatus for repairing a memory is provided. At least one memory is tested using a production test pattern. After the production test, a passing or failing status is determined for each memory tested. This determination may be made using a built-in repair analysis (BIRA) program. After the analysis the location of each failing memory is determined. A fuse register pattern is then determined for the failing memory, and at least one fuse is blown to repair the failed memory. The repair utilizes at least one of the redundant memories present in the semiconductor device. The apparatus includes a semiconductor device having repairable memories, a fuse programmable read-only memory (FPROM) that contains multiple redundant memories, and a fuse box memory repair apparatus that is in communication with the FRPOM and the multiple repairable memories.

Abstract: A method and apparatus for repairing a memory is provided. At least one memory is tested using a production test pattern. After the production test, a passing or failing status is determined for each memory tested. This determination may be made using a built-in repair analysis (BIRA) program. After the analysis the location of each failing memory is determined. A fuse register pattern is then determined for the failing memory, and at least one fuse is blown to repair the failed memory. The repair utilizes at least one of the redundant memories present in the semiconductor device. The apparatus includes a semiconductor device having repairable memories, a fuse programmable read-only memory (FPROM) that contains multiple redundant memories, and a fuse box memory repair apparatus that is in communication with the FRPOM and the multiple repairable memories.