Patents by Inventor Vakul Garg

Vakul Garg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230222580
    Abstract: A method for presenting pre-approved and pre-underwritten offers to a customer may include: receiving targeting criteria based on at least one of current accounts with the financial institution, assets, creditworthiness, and credit risk for an offer for a financial product; identifying a target population of customers for the offer by applying the targeting criteria to a population of customers; reviewing each customer in the target population for underwriting for the financial product based on inferred income for each customer and accounts that each customer has with the financial institution, wherein the underwriting is performed before the financial product is offered; determining a channel to present the offer to one of the customers that passed underwriting; communicating the offer to the customer over the selected channel; and providing an accepted offer to a fulfilment engine, wherein the fulfilment engine initiates an account opening for the financial product.
    Type: Application
    Filed: March 17, 2023
    Publication date: July 13, 2023
    Inventors: W. David THOMAS, Claimonte NELSON, Dennis BOWERS, Michael S. HARTMAN, Steven Noel ROTH, Jagan DEVISETTY, Nagesh CHALASANI, Jason J. KIM, Marianna DULKINA, Suzanne DIMANT, Vakul GARG, Ajit NALLA, Daniel A. HAAS, James HENNESSEY, Keith REICHENBACH, Richard S. BUNKE, Seth GOLDKRANTZ, Stephani L. BREAULT, Steven ALLER, Vidyasankar NARAYANAN, Wade A. STRATTON, Margaret F. EVANS, Kapil BANSAL
  • Patent number: 11615467
    Abstract: A method for presenting pre-approved and pre-underwritten offers to a customer may include: receiving targeting criteria based on at least one of current accounts with the financial institution, assets, creditworthiness, and credit risk for an offer for a financial product; identifying a target population of customers for the offer by applying the targeting criteria to a population of customers; reviewing each customer in the target population for underwriting for the financial product based on inferred income for each customer and accounts that each customer has with the financial institution, wherein the underwriting is performed before the financial product is offered; determining a channel to present the offer to one of the customers that passed underwriting; communicating the offer to the customer over the selected channel; and providing an accepted offer to a fulfilment engine, wherein the fulfilment engine initiates an account opening for the financial product.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: March 28, 2023
    Assignee: JPMORGAN CHASE BANK, N.A.
    Inventors: W. David Thomas, Claimonte Nelson, Dennis Bowers, Michael S. Hartman, Steven Noel Roth, Jagan Devisetty, Nagesh Chalasani, Jason J. Kim, Marianna Dulkina, Suzanne Dimant, Vakul Garg, Ajit Nalla, Daniel A. Haas, James Hennessey, Keith Reichenbach, Richard S. Bunke, Seth Goldkrantz, Stephani L. Breault, Steven Aller, Vidyasankar Narayanan, Wade A. Stratton, Margaret F. Evans, Kapil Bansal
  • Publication number: 20200402162
    Abstract: A method for presenting pre-approved and pre-underwritten offers to a customer may include: receiving targeting criteria based on at least one of current accounts with the financial institution, assets, creditworthiness, and credit risk for an offer for a financial product; identifying a target population of customers for the offer by applying the targeting criteria to a population of customers; reviewing each customer in the target population for underwriting for the financial product based on inferred income for each customer and accounts that each customer has with the financial institution, wherein the underwriting is performed before the financial product is offered; determining a channel to present the offer to one of the customers that passed underwriting; communicating the offer to the customer over the selected channel; and providing an accepted offer to a fulfilment engine, wherein the fulfilment engine initiates an account opening for the financial product.
    Type: Application
    Filed: June 18, 2020
    Publication date: December 24, 2020
    Inventors: W. David THOMAS, Claimonte NELSON, Dennis BOWERS, Michael S. HARTMAN, Steven Noel ROTH, Jagan DEVISETTY, Nagesh CHALASANI, Jason J. KIM, Marianna DULKINA, Suzanne DIMANT, Vakul GARG, Ajit NALLA, Daniel A. HAAS, James HENNESSEY, Keith REICHENBACH, Richard S. BUNKE, Seth GOLDKRANTZ, Stephani L. BREAULT, Steven ALLER, Vidyasankar NARAYANAN, Wade A. STRATTON, Maggie Evans
  • Patent number: 10721219
    Abstract: A method is provided for establishing a communication session in a communications system. The method includes providing a handshake layer functional block in a first communication peer, and providing a data communication layer functional block separate from the handshake layer functional block in the first communication peer. Functionality of the data communication layer is not duplicated in the handshake layer. If the data communication layer is unable to process a received encrypted message; transmitting, by the data communication layer, a configuration request message to the handshake layer, and transmitting, by the handshake layer, in response to the configuration request message, a set channel state message to enable the data communication layer to process application data after a handshake phase of the protocol session is complete. Then, application data can be communicated through the data communication layer functional block of the first communication peer to a second communication peer.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: July 21, 2020
    Assignee: NXP B.V.
    Inventors: Geoffrey Thorpe, Peter Doliwa, Vakul Garg, Jan René Brands
  • Patent number: 10721061
    Abstract: A method is provided for establishing a secure communication session in a communication system. The method includes providing a handshake layer functional block and providing a record layer functional block separate from the handshake layer functional block. Functionality of the record layer functional block is not duplicated in the handshake layer functional block. The record layer functional block of a first communication peer generates an ephemeral key pair. A public key of the ephemeral key pair is transmitted to the handshake layer functional block of a second communication peer via the handshake layer functional block of the first communication peer. A session key is generated from the public key of the second communication peer and a private key of the first communication peer. Messages communicated between the first communication peer and the second communication peer are protected using the session key.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: July 21, 2020
    Assignee: NXP B.V.
    Inventors: Peter Doliwa, Vakul Garg
  • Patent number: 10659228
    Abstract: A method is provided for establishing a secure communication session in a communications system. The method includes providing a handshake layer functional block and providing a record layer functional block separate from the handshake layer functional block. A first ephemeral key pair is generated by the record layer functional block of a first communication peer. A public key of the first ephemeral key pair is transmitted to a second communication peer. The handshake layer functional block of the first communication peer generates a second ephemeral key pair. A public key of the second ephemeral key pair is transmitted to the second communication peer. The second communication peer generates a third ephemeral key pair. A handshake key is generated from the public key of the second communication peer and a private key of the handshake layer block of the first communication peer.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: May 19, 2020
    Assignee: NXP B.V.
    Inventors: Vakul Garg, Peter Doliwa
  • Publication number: 20200007321
    Abstract: A method is provided for establishing a secure communication session in a communication system. The method includes providing a handshake layer functional block and providing a record layer functional block separate from the handshake layer functional block. Functionality of the record layer functional block is not duplicated in the handshake layer functional block. The record layer functional block of a first communication peer generates an ephemeral key pair. A public key of the ephemeral key pair is transmitted to the handshake layer functional block of a second communication peer via the handshake layer functional block of the first communication peer. A session key is generated from the public key of the second communication peer and a private key of the first communication peer. Messages communicated between the first communication peer and the second communication peer are protected using the session key.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Inventors: PETER DOLIWA, VAKUL GARG
  • Publication number: 20200007519
    Abstract: A method is provided for establishing a communication session in a communications system. The method includes providing a handshake layer functional block in a first communication peer, and providing a data communication layer functional block separate from the handshake layer functional block in the first communication peer. Functionality of the data communication layer is not duplicated in the handshake layer. If the data communication layer is unable to process a received encrypted message; transmitting, by the data communication layer, a configuration request message to the handshake layer, and transmitting, by the handshake layer, in response to the configuration request message, a set channel state message to enable the data communication layer to process application data after a handshake phase of the protocol session is complete. Then, application data can be communicated through the data communication layer functional block of the first communication peer to a second communication peer.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Inventors: Geoffrey Thorpe, Peter Doliwa, Vakul Garg, Jan René Brands
  • Publication number: 20200007327
    Abstract: A method is provided for establishing a secure communication session in a communications system. The method includes providing a handshake layer functional block and providing a record layer functional block separate from the handshake layer functional block. A first ephemeral key pair is generated by the record layer functional block of a first communication peer. A public key of the first ephemeral key pair is transmitted to a second communication peer. The handshake layer functional block of the first communication peer generates a second ephemeral key pair. A public key of the second ephemeral key pair is transmitted to the second communication peer. The second communication peer generates a third ephemeral key pair. A handshake key is generated from the public key of the second communication peer and a private key of the handshake layer block of the first communication peer.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 2, 2020
    Inventors: VAKUL GARG, Peter Doliwa
  • Patent number: 9606926
    Abstract: A system for pre-fetching a data frame from a system memory to a cache memory includes a processor, a queue manager, and a pre-fetch manager. The processor issues a de-queue request associated with the data frame. The queue manager receives the de-queue request, identifies a frame descriptor associated with the data frame, and generates a pre-fetch hint signal. The pre-fetch manager receives the pre-fetch hint signal and generates a pre-fetch signal and enables the cache memory to pre-fetch the data frame. Subsequently, the queue manager de-queues the frame descriptor. The processor receives the frame descriptor and reads the data frame from the cache memory.
    Type: Grant
    Filed: November 29, 2014
    Date of Patent: March 28, 2017
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Vakul Garg, Bharat Bhushan
  • Patent number: 9569264
    Abstract: A data processing system includes a host processor, a co-processor, and a memory that includes multiple buffer descriptor (BD) rings. The host processor includes multiple cores that execute multiple threads to process data packets stored in the memory. The host processor generates a notification command based on multiple context switch events that occur in the cores. The notification command indicates a context switch event type and BD ring IDs associated with BD rings to be polled by the co-processor. The BD rings are referred to as active BD rings. The co-processor polls only the active BD rings based on the notification command and processes the data packets associated with the active BD rings.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: February 14, 2017
    Assignee: Freescale Semiconductor,Inc.
    Inventors: Vakul Garg, Bharat Bhushan, Ruchika Gupta
  • Publication number: 20160274936
    Abstract: A data processing system includes a host processor, a co-processor, and a memory that includes multiple buffer descriptor (BD) rings. The host processor includes multiple cores that execute multiple threads to process data packets stored in the memory. The host processor generates a notification command based on multiple context switch events that occur in the cores. The notification command indicates a context switch event type and BD ring IDs associated with BD rings to be polled by the co-processor. The BD rings are referred to as active BD rings. The co-processor polls only the active BD rings based on the notification command and processes the data packets associated with the active BD rings.
    Type: Application
    Filed: March 17, 2015
    Publication date: September 22, 2016
    Inventors: VAKUL GARG, Bharat Bhushan, Ruchika Gupta
  • Patent number: 9396154
    Abstract: A system for managing data packets has multiple cores, a data buffer, a hardware accelerator, and an interrupt controller. The interrupt controller transmits a first interrupt signal to a first one of the cores based on a first hardware signal received from the hardware accelerator. The first core creates a copy of buffer descriptors (BD) of a buffer descriptor ring that correspond to the data packets in the data buffer in a first virtual queue and indicates to the hardware accelerator that the data packets are processed. If there are additional data packets, the interrupt controller transmits a second interrupt signal to a second core, which performs the same steps as performed by the first core. The first and the second cores simultaneously process the data packets associated with the BDs in the first and second virtual queues, respectively.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: July 19, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Vakul Garg, Bharat Bhushan
  • Publication number: 20160154737
    Abstract: A system for pre-fetching a data frame from a system memory to a cache memory includes a processor, a queue manager, and a pre-fetch manager. The processor issues a de-queue request associated with the data frame. The queue manager receives the de-queue request, identifies a frame descriptor associated with the data frame, and generates a pre-fetch hint signal. The pre-fetch manager receives the pre-fetch hint signal and generates a pre-fetch signal and enables the cache memory to pre-fetch the data frame. Subsequently, the queue manager de-queues the frame descriptor. The processor receives the frame descriptor and reads the data frame from the cache memory.
    Type: Application
    Filed: November 29, 2014
    Publication date: June 2, 2016
    Inventors: Vakul Garg, Bharat Bhushan
  • Publication number: 20150301975
    Abstract: A system for managing data packets has multiple cores, a data buffer, a hardware accelerator, and an interrupt controller. The interrupt controller transmits a first interrupt signal to a first one of the cores based on a first hardware signal received from the hardware accelerator. The first core creates a copy of buffer descriptors (BD) of a buffer descriptor ring that correspond to the data packets in the data buffer in a first virtual queue and indicates to the hardware accelerator that the data packets are processed. If there are additional data packets, the interrupt controller transmits a second interrupt signal to a second core, which performs the same steps as performed by the first core. The first and the second cores simultaneously process the data packets associated with the BDs in the first and second virtual queues, respectively.
    Type: Application
    Filed: April 22, 2014
    Publication date: October 22, 2015
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Vakul Garg, Bharat Bhushan
  • Publication number: 20150012711
    Abstract: A system for operating a shared memory of a multiprocessor system includes a set of processor cores and a corresponding set of core local caches, a set of I/O devices and a corresponding set of I/O device local caches. Read and write operations performed on a core local cache, an I/O device local cache, and the shared memory are governed by a cache coherence protocol (CCP) that ensures that the shared memory is updated atomically.
    Type: Application
    Filed: July 4, 2013
    Publication date: January 8, 2015
    Inventors: VAKUL GARG, Varun Sethi, Bharat Bhushan
  • Patent number: 8671232
    Abstract: A system and method for dynamically migrating stash transactions include first and second processing cores, an input/output memory management unit (IOMMU), an IOMMU mapping table, an input/output (I/O) device, a stash transaction migration management unit (STMMU), and an operating system (OS) scheduler. The first core executes a first thread associated with a frame manager. The OS scheduler migrates the first thread from the first core to the second core and generates pre-empt notifiers to indicate scheduling-out and scheduling-in of the first thread from the first core and to the second core. The STMMU uses the pre-empt notifiers to enable dynamic stash transaction migration.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 11, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Vakul Garg, Varun Sethi
  • Publication number: 20130227243
    Abstract: A multi-core processor includes logical partitions that have respective processor cores, memory areas, and Ethernet controllers. At least one of the Ethernet controllers is disabled for external communication and is assigned as an inter-partition Ethernet controller for inter-partition communication. The inter-partition Ethernet controller is configured in loopback mode. A transmitting partition addresses a message through a send buffer in a private memory area to the inter-partition Ethernet controller assigned to a receiving partition. The receiving inter-partition Ethernet controller copies the received message to a receive buffer in the receiving partition's memory area. The receive Ethernet controller returns the received message to the sending partition and the sending partition resumes control of the memory space of the send buffer, or alternatively, the receive Ethernet controller frees the memory space of the send buffer to the private memory of the sending partition.
    Type: Application
    Filed: February 23, 2012
    Publication date: August 29, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventor: Vakul Garg