Abstract: An interchangeable keyboard application module is connected to a video monitor module in a computer terminal to provide sequences of processor instructions and a keyboard for performing a plurality of selectable applications. The video monitor module includes a CRT display, a serial I/O interface and a processor that processes characters received through the serial I/O interface for display on the CRT screen whether or not the application module is attached. The processor in the video monitor module detects the connection of the application module, and then selects its instructions from a memory in the application module first, to prompt the selection of a mode of operation for the terminal, and second to execute the selected mode of operation. The application module uses a plurality of keyboard overlays, each corresponding to a respective mode of operation. In a specific embodiment two of the modes of operation are programming applications related to programmable controllers.

Abstract: A memory circuit receives memory modules which may vary in their size and their type. The memory circuit includes a decoder circuit which receives size feedback signals from each memory module which enables it to automatically assign each module the address space it requires. If the size of a memory module is changed, the decoder circuit reassigns the address space to accommodate the new module. Type feedback signals generated by each memory module enable the memory circuit to apply the proper control signals and enable the proper supporting circuitry when the memory module is addressed.

Abstract: A rack adapter for a programmable controller is included in each of four remotely located I/O interface racks that are connected in series to a central processor. The rack adapter includes a rack interface processor under program control which converts serial data received from the central processor to parallel data that is written into I/O modules in its rack. The rack interface processor also converts parallel data from I/O modules to serial data, which is sent back to the central processor through a select data out circuit in proper sequence with data from the other racks. The rack interface processor initiates the decontrol of machines connected to the four racks if a major transmission fault occurs, but the rack interface processor is tolerant to transmission errors caused by electrical noise.

Abstract: A battery monitoring circuit in a programmable controller generates a logic signal when it senses a low output voltage from a memory back-up battery. A controller processor is programmed to set a fault status bit and store it in a memory with input/output status data. The fault status bit is output to an I/O interface rack together with input/output status data during an I/O scan routine. The fault status bit generates a logic signal to a fault indicating device on the I/O interface rack to signal an under-energized memory battery in the controller processor.

Abstract: A microprocessor based program loader is connected to the memory data bus and memory address bus of a programmable controller. The program loader is responsive to commands entered through a keyboard to load and edit the programmable controller control program. A mode switch associated with the programmable controller provides a number of selectable positions which determine the mode of operation of the programmable controller and the functions that can be performed by the program loader. One of the positions on this mode switch enables the program loader through a control line to assume control of the mode selection. The operator can thus control the mode of operation through the program loader keyboard which may be located remotely from the programmable controller.

Abstract: A programmable controller sequentially executes a control program at a basic "scan rate" determined by the length of the program and the speed at which the controller processor executes the instructions therein. At the completion of each scan through the control program an I/O scan is performed which inputs the status of all sensing devices to the controller image table and outputs status data from the image table to operating devices. The present invention enables the status of selected sensing devices to be inputted and acted upon at any point during the scan through the control program and it enables the output of the processor logic unit to be coupled to a selected operating device at any point. The rate at which selected I/O devices can be scanned by the controller is thus programmable and may be much higher than the basic scan rate of the controller.

Abstract: An eight-bit microprocessor sequentially reads controller type instructions from a memory and applies the operation codes of selected ones of the instructions to a hardwired Boolean processor. The microprocessor also couples status words between an I/O image table stored in the memory and the I/O interface racks which connect the programmable controller to the machine being controlled. In general, those controller type instructions which are word oriented are executed by the microprocessor and those which are single-bit oriented are executed by the Boolean processor. The Boolean processor is operable in combination with the microprocessor to examine selected status bits in the I/O image table and to set selected status bits therein to a logic state which is determined in part by the state of the examined status bits.

Abstract: A programmable controller for sensing the status of sensing devices and controlling the state of operating devices in accordance with a stored program includes a position encoder input module which receives position data. In response to instructions in the stored program, the position data from the input module is compared with an upper and a lower limit stored in the controller memory, and if the data lies outside the limits, the controller logic unit is forced to a false decision.

Abstract: A controller programmer connects to a programmable controller and serves as a means for loading and editing the control program. When the contact histogram mode of operation is employed the logic state of a selected I/O device connected to the controller is monitored, and each time its status changes, its present status is recorded along with the time interval between status changes. A first embodiment is described in which the invention is employed in a hardwired controller program loader and a second embodiment is described in which the controller program loader employs a programmed microprocessor. In the first embodiment the status changes are recorded on paper tape and in the second embodiment they are recorded on a cathode ray tube screen.