Patents by Inventor Valentin Anders

Valentin Anders has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10489251
    Abstract: Implementations may obtain a backup from a first storage system accessible outside a local area network (LAN). The backup may be stored on a second storage system inaccessible outside the LAN. An authorized backup user may be authenticated and the backup may be copied from the to a third storage system accessible outside the LAN.
    Type: Grant
    Filed: November 18, 2014
    Date of Patent: November 26, 2019
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Valentin Anders
  • Publication number: 20170220425
    Abstract: Implementations may obtain a backup from a first storage system accessible outside a local area network (LAN). The backup may be stored on a second storage system inaccessible outside the LAN. An authorized backup user may be authenticated and the backup may be copied from the to a third storage system accessible outside the LAN.
    Type: Application
    Filed: November 18, 2014
    Publication date: August 3, 2017
    Inventor: Valentin ANDERS
  • Patent number: 9594619
    Abstract: A robust hardware fault management system, method and framework for providing robust hardware fault management for enterprise devices are disclosed. In one example, hardware devices and associated hardware modules in each of the enterprise devices requiring the robust hardware fault management are identified. Further, error structures associated with each hardware module are determined and unique identifiers are assigned to the determined error structures. Furthermore, the error structures are modeled in a centralized repository. In addition, rules are associated with each modeled error structure for detecting hardware failures. Moreover, the rules of each modeled error structure are stored in the centralized repository using associated rule identifiers.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: March 14, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Suhas Shivanna, Valentin Anders, Sunil Malhotra, Omkar S Prabhakar
  • Publication number: 20150293800
    Abstract: A robust hardware fault management system, method and framework for providing robust hardware fault management for enterprise devices are disclosed. In one example, hardware devices and associated hardware modules in each of the enterprise devices requiring the robust hardware fault management are identified. Further, error structures associated with each hardware module are determined and unique identifiers are assigned to the determined error structures. Furthermore, the error structures are modeled in a centralized repository. In addition, rules are associated with each modeled error structure for detecting hardware failures. Moreover, the rules of each modeled error structure are stored in the centralized repository using associated rule identifiers.
    Type: Application
    Filed: October 8, 2012
    Publication date: October 15, 2015
    Inventors: Suhas Shivanna, Valentin Anders, Sunil Malhotra, Omkar S Prabhakar
  • Publication number: 20110246833
    Abstract: One embodiment of a system for analyzing reliability of a communication link comprises a link control component that controls the communication link, where the link control component couples to a processor and a diagnostic component. The diagnostic component is configured to determine whether transmission errors have occurred on the communication link exceeding or matching a first programmable threshold over a range of multiple periods of time that exceeds or matches a second programmable threshold.
    Type: Application
    Filed: December 15, 2008
    Publication date: October 6, 2011
    Inventors: John W. Bockhaus, Patrick B. Nugent, Valentin Anders, Pavel Vasek
  • Patent number: 6453427
    Abstract: An uncorrectable error is detected in the data of a computer system. The erroneous data is allowed to be stored in first and second caches of the computer system while the system runs first and second processes, the first process being associated with the data. The first process is terminated when an attempt is made to load the data from the cache. Meanwhile, the second process continues to run.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: September 17, 2002
    Assignee: Intel Corporation
    Inventors: Nhon T. Quach, John W. C. Fu, James O. Hays, Valentin Anders, Sorin Iacobovici, Alberto J. Munoz, Dean A. Mulla
  • Publication number: 20010049798
    Abstract: An uncorrectable error is detected in the data of a computer system. The erroneous data is allowed to be stored in first and second caches of the computer system while the system runs first and second processes, the first process being associated with the data. The first process is terminated when an attempt is made to load the data from the cache. Meanwhile, the second process continues to run.
    Type: Application
    Filed: December 31, 1998
    Publication date: December 6, 2001
    Inventors: NHON T. QUACH, JOHN W. C. FU, VALENTIN ANDERS, SORIN IACOBOVICI, ALBERTO J. MUNOZ, DEAN MULLA, JAMES O. HAYS