Patents by Inventor Valentin Fuetterling

Valentin Fuetterling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10497173
    Abstract: A system and method for adaptive hierarchical tessellation. For example, one embodiment of a method comprises: a tessellation queue to store portions of a first image frame to be tessellated; motion vector analysis circuitry to group a plurality of sub-tiles within each of a plurality of tiles at multiple levels of granularity, wherein the sub-tiles of a first level comprise pixels and the sub-tiles of each successive level comprise tiles from a previous level, the motion vector analysis circuitry to iteratively analyze motion vectors of each group of sub-tiles at each level of granularity to determine whether the motion vectors are similar in accordance with a defined threshold, the motion vector analysis circuitry to queue tiles having sub-tiles which are determined to be dissimilar to the tessellation queue.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: December 3, 2019
    Assignee: Intel Corporation
    Inventors: Valentin Fuetterling, Gabor Liktor, Karthik Vaidyanathan
  • Patent number: 10482650
    Abstract: Examples relate to methods, a computer program and an apparatus for an ordered traversal of a subset of nodes of a tree structure and/or for determining an occlusion of a point along a ray in a raytracing scene. The method for the ordered traversal of the subset of nodes of the tree structure comprises obtaining ordering information indicating a desired order of the ordered traversal of the tree structure. The method further comprises selecting a predetermined ordering parameter template from a plurality of predetermined ordering parameter templates based on the ordering information. The method further comprises copying the subset of nodes of the tree structure from a first memory region to a second memory region using a single processor operation of a vector processing processor instruction set such that the subset of nodes of the tree structure is stored within the second memory region in the desired order.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: November 19, 2019
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e. V.
    Inventor: Valentin Fuetterling
  • Publication number: 20190340812
    Abstract: A system and method for adaptive hierarchical tessellation. For example, one embodiment of a method comprises: a tessellation queue to store portions of a first image frame to be tessellated; motion vector analysis circuitry to group a plurality of sub-tiles within each of a plurality of tiles at multiple levels of granularity, wherein the sub-tiles of a first level comprise pixels and the sub-tiles of each successive level comprise tiles from a previous level, the motion vector analysis circuitry to iteratively analyze motion vectors of each group of sub-tiles at each level of granularity to determine whether the motion vectors are similar in accordance with a defined threshold, the motion vector analysis circuitry to queue tiles having sub-tiles which are determined to be dissimilar to the tessellation queue.
    Type: Application
    Filed: May 7, 2018
    Publication date: November 7, 2019
    Inventors: VALENTIN FUETTERLING, GABOR LIKTOR, KARTHIK VAIDYANATHAN
  • Publication number: 20190035138
    Abstract: Examples relate to methods, a computer program and an apparatus for an ordered traversal of a subset of nodes of a tree structure and/or for determining an occlusion of a point along a ray in a raytracing scene. The method for the ordered traversal of the subset of nodes of the tree structure comprises obtaining ordering information indicating a desired order of the ordered traversal of the tree structure. The method further comprises selecting a predetermined ordering parameter template from a plurality of predetermined ordering parameter templates based on the ordering information. The method further comprises copying the subset of nodes of the tree structure from a first memory region to a second memory region using a single processor operation of a vector processing processor instruction set such that the subset of nodes of the tree structure is stored within the second memory region in the desired order.
    Type: Application
    Filed: November 16, 2017
    Publication date: January 31, 2019
    Inventor: Valentin Fuetterling