Patents by Inventor Valentina Popescu

Valentina Popescu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250117647
    Abstract: A method that may be computer implemented converts a tensor value from a first format to a second format and trains a neural network. The method determines a maximum exponent code in the first format and subtracts a first bias to obtain the highest needed exponent. It determines a second bias from the highest available code (HAC) in the second format and the HNE, and converts the tensor value from the first format to the second format by using the second bias instead of the first bias. The method uses the second format to train the neural network. The method may round the mantissa of the tensor value in the first format to obtain a rounded mantissa of the tensor value for the second format.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 10, 2025
    Applicant: SambaNova Systems, Inc.
    Inventors: Valentina Popescu, Jeffrey S. Brooks, Ram SIVARAMAKRISHNAN, Matthew William Ashcraft, Vinh Quang Nguyen, Gang Liu, Raghu PRABHAKAR, Yongning SHENG
  • Patent number: 11169776
    Abstract: Systems, apparatuses and methods may provide for technology that in response to an identification that one or more hardware units are to execute on a first type of data format, decomposes a first original floating point number to a plurality of first segmented floating point numbers that are to be equivalent to the first original floating point number. The technology may further in response to the identification, decompose a second original floating point number to a plurality of second segmented floating point numbers that are to be equivalent to the second original floating point number. The technology may further execute a multiplication operation on the first and second segmented floating point numbers to multiply the first segmented floating point numbers with the second segmented floating point numbers.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: November 9, 2021
    Assignee: Intel Corporation
    Inventors: Nitin N. Garegrat, Maciej Urbanski, Michael Rotzin, Brian J. Hickmann, Valentina Popescu
  • Publication number: 20190324723
    Abstract: Systems, apparatuses and methods may provide for technology that in response to an identification that one or more hardware units are to execute on a first type of data format, decomposes a first original floating point number to a plurality of first segmented floating point numbers that are to be equivalent to the first original floating point number. The technology may further in response to the identification, decompose a second original floating point number to a plurality of second segmented floating point numbers that are to be equivalent to the second original floating point number. The technology may further execute a multiplication operation on the first and second segmented floating point numbers to multiply the first segmented floating point numbers with the second segmented floating point numbers.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 24, 2019
    Applicant: Intel Corporation
    Inventors: Nitin N. Garegrat, Maciej Urbanski, Michael Rotzin, Brian J. Hickmann, Valentina Popescu