Abstract: An amplifier circuit comprising a basic amplifier which includes a first and a second transistor of opposite type in which the emitter terminal of the first transistor is connected to the input of the second transistor, and in which the collector terminal of the first transistor is connected to the emitter terminal of the second transistor to form a first current summing point, and a current mirror circuit connected to the first and second transistors to provide substantially equal collector current in each of the first and second transistors. The amplifier circuit includes a current source connected to said first current summing point to control the DC bias point of the first and second transistors. The amplifier may be adapted to a differential configuration using two basic amplifier circuits.