Patents by Inventor Valerie St. Cyr

Valerie St. Cyr has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6727780
    Abstract: A method for achieving a desired value of electrical impedance between conductors of an electrical power distribution structure by electrically coupling multiple bypass capacitors and corresponding electrical resistance elements in series between the conductors. The resistance elements may be annular resistors, and may provide the designer a greater degree of control of the system ESR. The annular resistors may comprise a first terminal, an annular resistor, and a second terminal. The second terminal may be located within the confines of the annular resistor. The annular resistors may be printed onto a conductive plane (e.g. a power plane or a ground plane), or may be a discrete component.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: April 27, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Istvan Novak, Valerie St.Cyr, Michael C. Freda, Merle Tetreault
  • Patent number: 6608257
    Abstract: A method of direct plane attachment of capacitors is disclosed. In one embodiment, a printed circuit board (PCB) having a signal layer, a first conductive plane, and a second conductive plane is provided. The signal layer may be the outermost layer of the PCB, while the first conductive layer may be arranged between the signal layer and the second conductive layer. A cavity may be formed in the printed circuit board, wherein the cavity extends from the signal layer down to the first conductive plane. The cavity may be large enough to accommodate one or more capacitors. A first terminal of the capacitor may be attached to the first conductive plane. The second terminal of the capacitor may be mounted within an opening in the first conductive plane. The method may allow a bypass capacitor to be directly coupled to a power or reference plane.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: August 19, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Valerie St. Cyr, Istvan Novak
  • Publication number: 20030076197
    Abstract: A method for achieving a desired value of electrical impedance between conductors of an electrical power distribution structure by electrically coupling multiple bypass capacitors and corresponding electrical resistance elements in series between the conductors. The resistance elements may be annular resistors, and may provide the designer a greater degree of control of the system ESR. The annular resistors may comprise a first terminal, an annular resistor, and a second terminal. The second terminal may be located within the confines of the annular resistor. The annular resistors may be printed onto a conductive plane (e.g. a power plane or a ground plane), or may be a discrete component.
    Type: Application
    Filed: October 24, 2001
    Publication date: April 24, 2003
    Inventors: Istvan Novak, Valerie St.Cyr, Michael C. Freda, Merle Tetreault
  • Patent number: 6538461
    Abstract: The problems outlined above may in large part be solved by a system and method for testing integrated passive components in a printed circuit board. In one embodiment, testing of integrated passive components may be conducted prior to completing the final lamination of the printed circuit board. The testing may be conducted on a tester having movable test probes. The method may include connecting a first test probe to a conductive plane, which may be electrically connected to the first terminals of two or more components. The conductive plane may be a ground plane, a power plane, or a signal plane. The first test probe may remain in a fixed position throughout the testing. A second test probe may be electrically connected to the second terminal of the first component. Following the connection of the second test probe, an electrical characteristic of the first component may be measured.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: March 25, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Istvan Novak, Valerie A. St. Cyr
  • Patent number: 6525622
    Abstract: Apparatus and methods for achieving a desired value of electrical impedance between parallel planar conductors of an electrical power distribution structure by electrically coupling multiple bypass capacitors and corresponding electrical resistance elements in series between the planar conductors. The methods include bypass capacitor selection criteria and electrical resistance determination criteria based upon simulation results. An exemplary electrical power distribution structure produced by one of the methods includes a pair of parallel planar conductors separated by a dielectric layer, n discrete electrical capacitors, and n electrical resistance elements, where n≧2. Each of the n discrete electrical resistance elements is coupled in series with a corresponding one of the n discrete electrical capacitors between the planar conductors. The n capacitors have substantially the same capacitance C, mounted resistance Rm, mounted inductance Lm, and mounted resonant frequency fm-res.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: February 25, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Istvan Novak, Valerie A. St. Cyr, Merle Tetreault, Daniel C. Irish
  • Publication number: 20020163327
    Abstract: The problems outlined above may in large part be solved by a system and method for testing integrated passive components in a printed circuit board. In one embodiment, testing of integrated passive components may be conducted prior to completing the final lamination of the printed circuit board. The testing may be conducted on a tester having movable test probes. The method may include connecting a first test probe to a conductive plane, which may be electrically connected to the first terminals of two or more components. The conductive plane may be a ground plane, a power plane, or a signal plane. The first test probe may remain in a fixed position throughout the testing. A second test probe may be electrically connected to the second terminal of the first component. Following the connection of the second test probe, an electrical characteristic of the first component may be measured.
    Type: Application
    Filed: May 1, 2001
    Publication date: November 7, 2002
    Inventors: Istvan Novak, Valerie A. St. Cyr