Patents by Inventor Valeriy Kudryavtsev

Valeriy Kudryavtsev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process and apparatus for placement of megacells in ICs design
    Publication number: 20050114813
    Abstract: An IC layout containing megacells placed in violation of design rules is corrected to remove design rule violations while maintaining the original placement as near as practical. The sizes of at least some of the megacells are inflated. The megacells are placed and moved in a footprint of the circuit in a manner to reduce placement complexity. The placement of the megacells is permuted to reduce placement complexity. Additional movements are be applied to the permuted placement to further reduce placement complexity.
    Type: Application
    Filed: November 21, 2003
    Publication date: May 26, 2005
    Applicant: LSI Logic Corporation
    Inventors: Alexei Galatenko, Valeriy Kudryavtsev, Elyar Gasanov