Abstract: Technologies for liquid metal mixtures for electrical interconnects are disclosed. In the illustrative embodiment, a gallium mixture includes gallium or gallium alloy mixed with fine particles of, e.g., gallium oxide. The fine particles change properties of the gallium or gallium alloy, such as the viscosity, surface tension, and surface bonding. As a result of the changes caused by the fine particles, the gallium mixture can be more easily integrated into electrical interconnects, such as by using screen printing techniques. In one embodiment, the gallium mixture may form an array of interconnects on an integrated circuit component for connecting to another integrated circuit component.

Abstract: In one embodiment, an integrated circuit apparatus comprises a substrate that includes electrical contacts on a first side of the substrate to couple the substrate to an integrated circuit die, a passivation layer on a second side of the substrate opposite the first side, metal pads on the second side of the substrate and within openings defined by the passivation layer, and solder bumps on the metal pads. The solder bumps are a material that is resistant to Gallium-based liquid metal embrittlement.

Abstract: A z-disaggregated integrated circuit package substrate assembly comprises a first substrate component (a coreless patch), a second substrate component (a core patch), and a third substrate component (an interposer). The coreless patch comprises thinner dielectric layers and higher density routing and can comprise an embedded bridge to allow for communication between integrated circuit dies attached to the coreless patch. The core layer acts as a middle layer interconnect between the coreless patch and the interposer and comprises liquid metal interconnects to connect the core patch physically and electrically to the coreless patch and the interposer. Core patch through holes comprise liquid metal plugs. Some through holes can be surrounded by and coaxially aligned with magnetic plugs to provide improved power signal delivery. The interposer comprises thicker dielectric layers and lower density routing.

Abstract: A stiffener for an integrated circuit (IC) package assembly including an IC die electrically interconnected to a substrate. The stiffener is to be mechanically attached to the substrate adjacent to at least one edge of the IC die and have a coefficient of linear thermal expansion (CTE) exceeding that of the substrate. The stiffener may be an “anti-invar” metallic alloy. Anti-invar alloys display “anti-invar” behavior where thermal expansion of the material is significantly enhanced relative to other compositions of the particular alloy system. A package stiffener may be a high-Mn steel, for example, such as ASTM International A128. In other examples, a package stiffener is a MnCuNi, FeNiMn, or FeNiCr alloy having an average CTE over a range of 25-100° C. of at least 18 ppm, and a room temperature modulus of elasticity of at least 120 GPa.