Patents by Inventor Vamsi Paidi

Vamsi Paidi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160080098
    Abstract: A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.
    Type: Application
    Filed: November 23, 2015
    Publication date: March 17, 2016
    Inventors: Glenn Chang, Raja Pullela, Madhukar Reddy, Timothy Gallagher, Shanta Murthy Prem Swaroop, Curtis Ling, Vamsi Paidi, Wenjian Chen
  • Patent number: 9203535
    Abstract: A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: December 1, 2015
    Assignee: MaxLinear, Inc.
    Inventors: Glenn Chang, Raja Pullela, Madhukar Reddy, Timothy Gallagher, Shanta Murthy Prem Swaroop, Curtis Ling, Vamsi Paidi, Wenjian Chen
  • Publication number: 20140335808
    Abstract: Methods and systems for a configurable low-noise amplifier with programmable band-selection filters may comprise a low-noise amplifier (LNA) with a low pass filter coupled to a first input of the LNA and a high pass filter coupled to a second input of the LNA. The low pass filter and the high pass filter may also be coupled to a signal source input. Signals may be received in a pass band of the high pass filter and a pass band of the low pass filter. Input signals in the pass band of the one filter (but not signals in the pass band of the other filter) may be amplified by coupling the one input of the LNA to ground and coupling the other filter to ground utilizing a shunt resistor. The filters may be configurable and may each comprise at least one inductor and at least one capacitor.
    Type: Application
    Filed: May 7, 2014
    Publication date: November 13, 2014
    Applicant: Maxlinear, Inc.
    Inventors: Raja Pullela, Wenjian Chen, Vamsi Paidi
  • Publication number: 20140320206
    Abstract: Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA comprises differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may comprise: a first inductor with a first terminal capacitively-coupled to a gate terminal of a first transistor of the differential pair transistors and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first transistor of the differential pair transistors, the fourth inductor may be coupled to a source terminal of the second transistor of the differential pair transistors, and the third inductor may be capacitively-coupled to a gate terminal of the second transistor of the differential pair transistors and also to ground. The second inductor may be embedded within the first inductor.
    Type: Application
    Filed: April 23, 2014
    Publication date: October 30, 2014
    Applicant: Maxlinear, Inc.
    Inventors: Abhishek Jajoo, Vamsi Paidi
  • Patent number: 8838057
    Abstract: A harmonic rejection mixer includes a first scaling circuit for scaling an RF signal to generate a plurality of scaled RF signals, a first switching stage for sampling the scaled RF signals using a first plurality of switching signals, and a second mixing stage for mixing the sampled RF signals with a second plurality of switching signals to generate a plurality of frequency translated signals having different phases. A combiner adds the frequency translated signals together to generate a first plurality of baseband versions of the RF signal. A first amplifier stage processes the first plurality of baseband versions to generate a second plurality of baseband versions. The mixer further includes a second scaling circuit for scaling the second plurality of baseband versions and a second amplifier stage to generate an in-phase baseband signal and a quadrature baseband signal from the scaled second plurality of baseband versions.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: September 16, 2014
    Assignee: MaxLinear, Inc.
    Inventors: Raja Pullela, Vamsi Paidi, Rahul Bhatia
  • Publication number: 20120322398
    Abstract: A harmonic rejection mixer includes a first scaling circuit for scaling an RF signal to generate a plurality of scaled RF signals, a first switching stage for sampling the scaled RF signals using a first plurality of switching signals, and a second mixing stage for mixing the sampled RF signals with a second plurality of switching signals to generate a plurality of frequency translated signals having different phases. A combiner adds the frequency translated signals together to generate a first plurality of baseband versions of the RF signal. A first amplifier stage processes the first plurality of baseband versions to generate a second plurality of baseband versions. The mixer further includes a second scaling circuit for scaling the second plurality of baseband versions and a second amplifier stage to generate an in-phase baseband signal and a quadrature baseband signal from the scaled second plurality of baseband versions.
    Type: Application
    Filed: December 20, 2011
    Publication date: December 20, 2012
    Applicant: MAXLINEAR, INC.
    Inventors: Raja Pullela, Vamsi Paidi, Rahul Bhatia
  • Publication number: 20120306576
    Abstract: An amplifier for providing improved third-order intermodulation (IM3) cancelation. The amplifier may comprise a main branch for amplifying input signals and an auxiliary branch for generating IM3 signals that are equal to corresponding IM3 components resulting from amplifying input signals via the main branch, with both of the main and the auxiliary branches being configured as differential circuits. The differential implementation may result in the auxiliary branch generating IM3 distortion signals with minimal or no non-IM3 signals. Each of the main and the auxiliary branches may comprise at least two transistor elements. Separate bias current sources may be applied to each of the main and the auxiliary branches. Operation of the auxiliary branch may be controlled by adjusting one or both of the bias current sources. Outputs of the main and the auxiliary branches may be cross-coupled, to invert a sign of IM3 distortion signals generated via the auxiliary branch.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 6, 2012
    Inventors: Vamsi Paidi, Masoud Koochakzadeh