Abstract: Systems and techniques are described for optimizing an integrated circuit (IC) design. Some embodiment can perform enumeration on a hardware description language (HDL) description of an IC design to obtain a enumerated IC design that includes at least one technology-independent wide-gate or technology-independent wide-bus, wherein the technology-independent wide-gate represents a logical function that is performed on a variable number of inputs, and wherein the technology-independent wide-bus represents a variable number of signals that are part of a bus. The embodiments can then perform technology-independent IC optimization, synthesis, and technology-dependent IC optimization to obtain an optimized and synthesized IC design.

Abstract: Systems and techniques are described for optimizing an integrated circuit (IC) design. Some embodiment can perform enumeration on a hardware description language (HDL) description of an IC design to obtain a enumerated IC design that includes at least one technology-independent wide-gate or technology-independent wide-bus, wherein the technology-independent wide-gate represents a logical function that is performed on a variable number of inputs, and wherein the technology-independent wide-bus represents a variable number of signals that are part of a bus. The embodiments can then perform technology-independent IC optimization, synthesis, and technology-dependent IC optimization to obtain an optimized and synthesized IC design.

Abstract: Systems and techniques are described for designing an integrated circuit (IC). Some embodiments identify and preserve slices by using new objects in an IC design data model. One or more IC design representations that are used in an IC design flow may natively support such slice objects. These new objects can enable rapid access and preservation of slices, thereby improving the runtime and/or quality of results (QoR) of an IC design system.

Abstract: Systems and techniques are described for designing an integrated circuit (IC). Some embodiments explicitly represent wide-buses as distinct objects in an IC design data model. One or more IC design representations that are used in an IC design flow may natively support such wide-bus objects. These new objects can enable rapid access and preservation of wide-buses, thereby improving the runtime and/or quality of results (QoR) of an IC design system.

Abstract: Systems and techniques are described for designing an integrated circuit (IC). Some embodiments explicitly represent wide-gates as distinct objects in an IC design data model. One or more IC design representations that are used in an IC design flow may natively support such wide-gate objects. These new objects can enable rapid access and preservation of wide-gates, thereby improving the runtime and/or quality of results (QoR) of an IC design system.