Patents by Inventor Vanaja Urrinkala

Vanaja Urrinkala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230289096
    Abstract: Methods, systems, and devices for improved performance in a fragmented memory system are described. The memory system may detect conditions associated with a random access parameter stored at the memory system to assess a level of data fragmentation. The memory system may determine that a random access parameter, such as a data fragmentation parameter, a size of information associated with an access command, a depth of a command queue, a delay duration, or a quantity of commands satisfies a threshold. If one or more of the random access parameters satisfies the threshold, the memory system may transmit a request for the host system to increase an associated clock frequency. The host system may increase the number of commands sent to the memory system in a duration of time. That is, the host system may compensate for a slow-down due to data storage fragmentation by increasing the command processing rate.
    Type: Application
    Filed: March 9, 2022
    Publication date: September 14, 2023
    Inventors: Vanaja Urrinkala, Sharath Chandra Ambula
  • Publication number: 20220350744
    Abstract: Methods, systems, and devices supporting techniques for pre-fetching information using pattern detection are described. Some memory systems may support pre-fetching information, such as logical-to-physical (L2P) mapping tables, data, or both, if a sequential pattern of read commands is detected. In some examples, the memory system may store a list of logical addresses indicated by received read commands and may determine whether the list corresponds to a sequential pattern independent of intervening write-alike commands. The list may store previous logical addresses for read commands, allowing the memory system to determine whether subsequent read commands form a sequential pattern. Additionally or alternatively, the memory system may track a ratio of hibernate commands to other commands (e.g., sequential read commands) and may refrain from pre-fetching L2P mapping tables for a detected sequence if the tracked ratio satisfies (e.g., exceeds) a threshold ratio.
    Type: Application
    Filed: April 18, 2022
    Publication date: November 3, 2022
    Inventors: Vanaja Urrinkala, Niraimathi N S