Patents by Inventor Vanamamalai Kannan

Vanamamalai Kannan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for mounting circuit design on reconfigurable device
    Patent number: 8136076
    Abstract: There is provided a system for generating configuration data for implementing a circuit design in a segmented reconfigurable device. A placement and routing design aiding system (30) includes a database (31) for storing hardware information (89) including data of PEs included in each segment and data of a first-level and second-level routing matrix and an apparatus (33) for mapping the circuit design onto the PEs. The mapping apparatus (33) generates mappings of the circuit design onto the PEs by carrying out an iterative algorithm that minimizes a cost function based on the hardware information (89). The cost function includes an item that minimizes usage of the second-level routing matrix (22) that connects between the segments.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: March 13, 2012
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Satish Bachina, Prakash S. Murthy, Vanamamalai Kannan, Vinay C. Hegde, Hiroyuki Kimura
  • METHOD AND SYSTEM FOR MOUNTING CIRCUIT DESIGN ON RECONFIGURABLE DEVICE
    Publication number: 20100017774
    Abstract: There is provided a system for generating configuration data for implementing a circuit design in a segmented reconfigurable device. A placement and routing design aiding system (30) includes a database (31) for storing hardware information (89) including data of PEs included in each segment and data of a first-level and second-level routing matrix and an apparatus (33) for mapping the circuit design onto the PEs. The mapping apparatus (33) generates mappings of the circuit design onto the PEs by carrying out an iterative algorithm that minimizes a cost function based on the hardware information (89). The cost function includes an item that minimizes usage of the second-level routing matrix (22) that connects between the segments.
    Type: Application
    Filed: August 31, 2007
    Publication date: January 21, 2010
    Applicant: IPFLEX INC.
    Inventors: Satish Bachina, Prakash Sreedhar Murthy, Vanamamalai Kannan, Vinay Chidambar Hegde, Hiroyuki Kimura