Patents by Inventor Vanessa Ramirez

Vanessa Ramirez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8035935
    Abstract: A countermeasure for mitigating Electromagnetic Pulse E3 (EMP-E3) induced currents flowing through the neutral of a star-connected three-phase power transformer without compromising its neutral end insulation performance. It comprises an external neutral-grounding device; a first linear resistor (R10) is connected from the transformer neutral (N) to ground (G) sized to render said induced currents, for any given EMP-E3 severity, reduced and inconsequential to the equipment operation. Contingently, a second non-linear neutral-grounding resistor (R11) provides a shunting path-to-ground of substantially low resistance, as prevailing by virtue of its non-linearity under large power system fault currents; such a bypass functionality is formulated/designed according to IEEE/ANSI/NEMA recommended insulation coordination guidelines in order to sustain proper protective margins to the equipment neutral basic insulation levels (BIL/BSL).
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: October 11, 2011
    Inventors: Vanessa Ramirez, Alberto Ramirez
  • Publication number: 20110090606
    Abstract: A countermeasure for mitigating Electromagnetic Pulse E3 (EMP-E3) induced currents flowing through the neutral of a star-connected three-phase power transformer without compromising its neutral end insulation performance. It comprises an external neutral-grounding device; a first linear resistor (R10) is connected from the transformer neutral (N) to ground (G) sized to render said induced currents, for any given EMP-E3 severity, reduced and inconsequential to the equipment operation. Contingently, a second non-linear neutral-grounding resistor (R11) provides a shunting path-to-ground of substantially low resistance, as prevailing by virtue of its non-linearity under large power system fault currents; such a bypass functionality is formulated/designed according to IEEE/ANSI/NEMA recommended insulation coordination guidelines in order to sustain proper protective margins to the equipment neutral basic insulation levels (BIL/BSL).
    Type: Application
    Filed: October 19, 2009
    Publication date: April 21, 2011
    Inventors: Vanessa Ramirez, Alberto Ramirez