Patents by Inventor Vara Vakada

Vara Vakada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9064868
    Abstract: One illustrative device disclosed herein includes a transistor comprising a gate electrode and a drain region formed in a semiconducting substrate, an isolation structure formed in the substrate, wherein the isolation structure is laterally positioned between the gate electrode and the drain region, and a Faraday shield that is positioned laterally between the gate electrode and the drain region and above the isolation structure, wherein the Faraday shield has a long axis that is oriented substantially vertically relative to an upper surface of the substrate.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: June 23, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Yanxiang Liu, Vara Vakada, Jerome Ciavatti
  • Publication number: 20140103420
    Abstract: One illustrative device disclosed herein includes a transistor comprising a gate electrode and a drain region formed in a semiconducting substrate, an isolation structure formed in the substrate, wherein the isolation structure is laterally positioned between the gate electrode and the drain region, and a Faraday shield that is positioned laterally between the gate electrode and the drain region and above the isolation structure, wherein the Faraday shield has a long axis that is oriented substantially vertically relative to an upper surface of the substrate.
    Type: Application
    Filed: October 12, 2012
    Publication date: April 17, 2014
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Yanxiang Liu, Vara Vakada, Jerome Ciavatti
  • Patent number: 8664717
    Abstract: This application is directed to a semiconductor device with an oversized local contact as a Faraday shield, and methods of making such a semiconductor device. One illustrative device disclosed herein includes a transistor comprising a gate electrode and a source region, a source region conductor that is conductively coupled to the source region, a Faraday shield positioned above the source region conductor and the gate electrode and a first portion of a first primary metallization layer for an integrated circuit device positioned above and electrically coupled to the Faraday shield.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: March 4, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Yanxiang Liu, Young Way Teh, Vara Vakada
  • Publication number: 20130175617
    Abstract: This application is directed to a semiconductor device with an oversized local contact as a Faraday shield, and methods of making such a semiconductor device. One illustrative device disclosed herein includes a transistor comprising a gate electrode and a source region, a source region conductor that is conductively coupled to the source region, a Faraday shield positioned above the source region conductor and the gate electrode and a first portion of a first primary metallization layer for an integrated circuit device positioned above and electrically coupled to the Faraday shield.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 11, 2013
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Yanxiang Liu, Young Way Teh, Vara Vakada