Patents by Inventor Varadarajan L. Narasimhan

Varadarajan L. Narasimhan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Programmable logic device macrocell with two OR array inputs
    Patent number: 5287017
    Abstract: A programmable logic device (PLD) is disclosed, which can efficiently, in a realestate sense, emulate a Mealy state machine. Specifically, there is a PLD which has macrocells which accept signals from two separate logical OR arrays. Where the first array and macrocell produces a latched output signal and the second array and macrocell circuit produces a non-latched output signal.
    Type: Grant
    Filed: May 15, 1992
    Date of Patent: February 15, 1994
    Assignee: Micron Technology, Inc.
    Inventors: Varadarajan L. Narasimhan, Kurt P. Douglas, Paul S. Zagar
  • Field programmable logic array with speed optimized architecture
    Patent number: 5235221
    Abstract: A programmable logic device (PLD) is disclosed for finding a sum of products or other logic equations. Specifically, there is a PLD which has: 1) a programmable logical AND and programmable logical OR arrays/matrices, similar to a field programmable logic array; and 2) the fully programmable OR array has an optimized signal speed path and non-optimized signal speed path.
    Type: Grant
    Filed: April 8, 1992
    Date of Patent: August 10, 1993
    Assignee: Micron Technology, Inc.
    Inventors: Kurt P. Douglas, Paul S. Zagar, Varadarajan L. Narasimhan