Patents by Inventor Varsha Bansal

Varsha Bansal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for testing clocking systems in integrated circuits
    Patent number: 11879939
    Abstract: An integrated circuit (IC) includes a clocking system that generates first and second clock signals and a clock enable signal, and a testing system that tests the clocking system. During a capture phase of an at-speed testing mode of the IC, the second clock signal is a gated version of the first clock signal and includes two clock pulses. The testing system determines a first count of clock pulses of the first clock signal between an activation of the capture phase and an assertion of the clock enable signal. Similarly, the testing system determines a second count of clock pulses of the first clock signal between the two clock pulses of the second clock signal. The testing system then compares the first count with a first reference value and the second count with a second reference value to detect a fault in the clocking system.
    Type: Grant
    Filed: February 8, 2022
    Date of Patent: January 23, 2024
    Assignee: NXP B.V.
    Inventors: Nikila Krishnamoorthy, Abhishek Mahajan, Rishabh Kaistha, Varsha Bansal
  • SYSTEM AND METHOD FOR TESTING CLOCKING SYSTEMS IN INTEGRATED CIRCUITS
    Publication number: 20230251310
    Abstract: An integrated circuit (IC) includes a clocking system that generates first and second clock signals and a clock enable signal, and a testing system that tests the clocking system. During a capture phase of an at-speed testing mode of the IC, the second clock signal is a gated version of the first clock signal and includes two clock pulses. The testing system determines a first count of clock pulses of the first clock signal between an activation of the capture phase and an assertion of the clock enable signal. Similarly, the testing system determines a second count of clock pulses of the first clock signal between the two clock pulses of the second clock signal. The testing system then compares the first count with a first reference value and the second count with a second reference value to detect a fault in the clocking system.
    Type: Application
    Filed: February 8, 2022
    Publication date: August 10, 2023
    Inventors: Nikila Krishnamoorthy, Abhishek Mahajan, Rishabh Kaistha, Varsha Bansal