Patents by Inventor Varun R. Verma

Varun R. Verma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and Methods Using Improved Clock Gating Cells
    Publication number: 20100109747
    Abstract: A clock gating cell that comprises a latch in communication with an input enable logic and an output logic circuit, wherein the latch includes a pull-up and/or a pull-down circuit at an input node of the output logic circuit and circuitry preventing premature charge or discharge of the output logic circuit input node by the pull-up and/or the pull-down circuit when the clock gating cell is enabled.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 6, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Animesh Datta, Martin Saint-Laurent, Varun R. Verma, Prayag B. Patel