Patents by Inventor Vasavi V

Vasavi V has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • HARDWARE INTEGRITY VERIFICATION MECHANISM
    Publication number: 20220100908
    Abstract: An apparatus is disclosed. The apparatus comprises a system on chip (SOC), including a plurality of hardware components and a processor to launch a secure execution environment to verify integrity of the plurality of hardware components using an expected integrity measurement generated based on properties of the plurality of hardware components.
    Type: Application
    Filed: December 8, 2021
    Publication date: March 31, 2022
    Applicant: Intel Corporation
    Inventors: Taj un Nisha N, Vasanth Kumar Nagaraja, Vasavi V
  • SOFTWARE LIBRARY INTEGRITY VERIFICATION MECHANISM
    Publication number: 20220100906
    Abstract: An apparatus is disclosed. The apparatus comprises a processor to generate a launch control policy (LCP) comprising a plurality of measured launch environment (MLE) elements associated with one or more libraries of a software application and a cryptographic processor to deploy the LCP to generate root of trust (ROT) measurements, wherein the processor to perform launch verification to execute the one or more libraries upon execution and to verify integrity of the one or more libraries based on the associated MLEs and the ROT measurements.
    Type: Application
    Filed: December 8, 2021
    Publication date: March 31, 2022
    Applicant: Intel Corporation
    Inventors: Vasanth Kumar Nagaraja, Taj un nisha N, Vasavi V