Patents by Inventor Vasil Vorsa
Vasil Vorsa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230044068Abstract: Disclosed herein is a method for producing a film of mixed yttrium and hafnium oxides, nitrides or fluorides on a substrate by an atomic layer deposition process. The process includes providing a reaction chamber containing a substrate, pulsing into the chamber an yttrium source reactant; purging the chamber with a purging material; pulsing into the chamber a co-reactant precursor; purging the chamber with a purging material (first subcycle); pulsing into the chamber a hafnium source reactant; purging the chamber with a purging material; pulsing into the chamber a co-reactant precursor; urging the chamber with a purging material (second subcycle). Each subcycle may be repeated multiple times in a super cycle.Type: ApplicationFiled: July 28, 2022Publication date: February 9, 2023Applicant: Greene, Tweed Technologies, Inc.Inventors: Alexadru C. Pavel, Vasil Vorsa
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Patent number: 11421319Abstract: The invention relates to a method for fabricating a plasma etch-resistant film (1) on a surface of a substrate (2), wherein the method comprises the step of forming a film comprising an intermediate layer (4) of rare earth metal oxide, rare earth metal carbonate, or rare earth metal oxycarbonate, or any mixture thereof on a first layer (3) of rare earth metal oxide, wherein the rare earth metal is the same in the first layer and in the intermediate layer. The invention further relates to a plasma etch-resistant film and to the use thereof.Type: GrantFiled: December 29, 2020Date of Patent: August 23, 2022Assignee: BENEQ OYInventors: Pekka J. Soininen, Vasil Vorsa, Mohammad Ameen
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Publication number: 20220098735Abstract: Disclosed herein are methods for the deposition of a plasma resistant coating onto a substrate using an atomic layer deposition process. The process includes carrying out a an ALD deposition cycle that includes at least the steps of: providing an ALD reactant chamber with a substrate; pulsing into the chamber a first coating precursor (Coat1Pre); pulsing into the chamber a second coating precursor (Coat2Pre), substantially immediately after the completion of the pulse of Coat1Pre; purging the chamber; pulsing into the chamber a co-reactant precursor; and purging the chamber. At completion of a cycle, a monolayer is deposited. The monolayer is or is included in a mixed coating of substantial homogeneity. The methods may be varied, e.g., the second or third steps can be repeated multiple times (1 to 4 times or 2 to 8 times). If one desired to prepare mixed coatings or more than two components, other steps may be added, e.g.Type: ApplicationFiled: June 23, 2021Publication date: March 31, 2022Inventors: Alexandru C. Pavel, Vasil Vorsa
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Publication number: 20210115555Abstract: The invention relates to a method for fabricating a plasma etch-resistant film (1) on a surface of a substrate (2), wherein the method comprises the step of forming a film comprising an intermediate layer (4) of rare earth metal oxide, rare earth metal carbonate, or rare earth metal oxycarbonate, or any mixture thereof on a first layer (3) of rare earth metal oxide, wherein the rare earth metal is the same in the first layer and in the intermediate layer. The invention further relates to a plasma etch-resistant film and to the use thereof.Type: ApplicationFiled: December 29, 2020Publication date: April 22, 2021Inventors: Pekka J. SOININEN, Vasil VORSA, Mohammad AMEEN
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Patent number: 10961620Abstract: The invention relates to a method for fabricating a plasma etch-resistant film (1) on a surface of a substrate (2), wherein the method comprises the step of forming a film comprising an intermediate layer (4) of rare earth metal oxide, rare earth metal carbonate, or rare earth metal oxycarbonate, or anymixture thereof on a first layer (3) of rare earth metal oxide, wherein the rare earth metal is the same in the first layer and in the intermediate layer. The invention further relates to a plasma etch-resistant film and to the use thereof.Type: GrantFiled: March 3, 2017Date of Patent: March 30, 2021Assignee: BENEQ OYInventors: Pekka J. Soininen, Vasil Vorsa, Mohammad Ameen
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Publication number: 20200131632Abstract: The present invention relates to a method of providing a multi-layer coating to a surface of a substrate, a multi-layer coating prepared by the method and a component comprising the multi-layer coating. The present invention also relates to a method of suppressing or inhibiting growth of a certain phases and/or structures of a crystalline structure with an amorphous first metal oxide coating and a substrate having a surface bearing the coating.Type: ApplicationFiled: October 25, 2019Publication date: April 30, 2020Inventors: Alexandru Pavel, Vasil Vorsa
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Publication number: 20200080197Abstract: The invention relates to a method for fabricating a plasma etch-resistant film (1) on a surface of a substrate (2), wherein the method comprises the step of forming a film comprising an intermediate layer (4) of rare earth metal oxide, rare earth metal carbonate, or rare earth metal oxycarbonate, or anymixture thereof on a first layer (3) of rare earth metal oxide, wherein the rare earth metal is the same in the first layer and in the intermediate layer. The invention further relates to a plasma etch-resistant film and to the use thereof.Type: ApplicationFiled: March 3, 2017Publication date: March 12, 2020Inventors: Pekka J. SOININEN, Vasil VORSA, Mohammad AMEEN
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Publication number: 20140099491Abstract: The invention includes a plasma etch-resistant film for a substrate comprising a yttria material wherein at least a portion of the yttria material is in a crystal phase having a crystal lattice structure, wherein at least 50% of the yttria material is in a form of a monoclinic crystal system. The film may be treated by exposure to a fluorine gas plasma. Also included are plasma etch-resistant articles that include a substrate and a film, wherein the film comprises an yttria material and at least a portion of the yttria material is present in the film in a crystal phase having a crystal lattice structure and at least 50% of the yttria material is in a form of a monoclinic crystal system. Several methods are contemplated within the scope of the invention.Type: ApplicationFiled: October 9, 2012Publication date: April 10, 2014Inventors: Mohammed Ameen, Sang-Ho Lee, Thomas Mercer, Vasil Vorsa
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Publication number: 20140065844Abstract: The present invention is a method to increase the intrinsic compressive stress in plasma enhanced chemical vapor deposition (PECVD) silicon nitride (SiN) and silicon carbonitride (SiCN) thin films, comprising depositing the film from an amino vinylsilane-based precursor. More specifically the present invention uses the amino vinylsilane-based precursor selected from the formula: [RR1N]xSiR3y(R2)z, where x+y+z=4, x=1-3, y=0-2, and z=1-3; R, R1 and R3 can be hydrogen, C1 to C10 alkane, alkene, or C4 to C12 aromatic; each R2 is a vinyl, allyl or vinyl-containing functional group.Type: ApplicationFiled: November 4, 2013Publication date: March 6, 2014Inventors: Vasil Vorsa, Andrew David Johnson, Manchao Xiao
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Patent number: 8580993Abstract: The present invention is a method to increase the intrinsic compressive stress in plasma enhanced chemical vapor deposition (PECVD) silicon nitride (SiN) and silicon carbonitride (SiCN) thin films, comprising depositing the film from an amino vinylsilane-based precursor. More specifically the present invention uses the amino vinylsilane-based precursor selected from the formula: [RR1N]xSiR3y(R2)z, where x+y+z=4, x=1-3, y=0-2, and z=1-3; R, R1 and R3 can be hydrogen, C1 to C10 alkane, alkene, or C4 to C12 aromatic; each R2 is a vinyl, allyl or vinyl-containing functional group.Type: GrantFiled: October 30, 2009Date of Patent: November 12, 2013Assignee: Air Products and Chemicals, Inc.Inventors: Vasil Vorsa, Andrew David Johnson, Manchao Xiao
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Patent number: 8431419Abstract: A semiconductor growth system includes a chamber and a source of electromagnetic radiation. A detector is arranged to detect absorption of radiation from the source by a chloride- based chemical of the reaction chamber. A control system controls the operation of the chamber in response to the absorption of radiation by the chloride-based chemical. The control system controls the operation of the chamber by adjusting a parameter of the reaction chamber.Type: GrantFiled: July 21, 2009Date of Patent: April 30, 2013Assignee: SoitecInventors: Ronald Thomas Bertram, Jr., Chantal Arena, Christiaan J. Werkhoven, Michael Albert Tischler, Vasil Vorsa, Andrew D. Johnson
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Publication number: 20120103519Abstract: Included within the scope of the invention are plasma etch-resistant films for substrates. The films include a yttria material and a at least a portion of the yttria material is in a crystal phase having an orientation defined by a Miller Index notation {111}. Also included are methods of manufacturing plasma etch-resistant films on a substrate. Such methods include applying a yttria material-containing composition onto at least a portion of a surface of a substrate to form a film. The film includes a yttria material and at least a portion of the yttria material is in a crystal phase having an orientation defined by a Miller Index notation {111}.Type: ApplicationFiled: October 24, 2011Publication date: May 3, 2012Inventors: Mohammed Aheem, Sang-Ho Lee, Thomas Mercer, Vasil Vorsa
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Publication number: 20110212546Abstract: A semiconductor growth system includes a chamber and a source of electromagnetic radiation. A detector is arranged to detect absorption of radiation from the source by a chloride- based chemical of the reaction chamber. A control system controls the operation of the chamber in response to the absorption of radiation by the chloride-based chemical. The control system controls the operation of the chamber by adjusting a parameter of the reaction chamber.Type: ApplicationFiled: July 21, 2009Publication date: September 1, 2011Inventors: Ronald Thomas Bertram Jr., Chantal Arena, Christiaan J. Werkhoven, Michael Albert Tischler, Vasil Vorsa, Andrew D. Johnson
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Publication number: 20100180913Abstract: The present invention is related to the field of semiconductor processing equipment and methods and provides, in particular, methods and apparatus for in-situ removal of undesired deposits in the interiors of reactor chambers, for example, on chamber walls and elsewhere. The invention provides methods according to which cleaning steps are integrated and incorporated into a high-throughput growth process. Preferably, the times when growth should be suspended and cleaning commenced and when cleaning should be terminated and growth resumed are automatically determined based on sensor inputs. The invention also provides reactor chamber systems for the efficient performance of the integrated cleaning/growth methods of this invention.Type: ApplicationFiled: December 5, 2008Publication date: July 22, 2010Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, JR., Andrew D. Johnson, Vasil Vorsa, Robert Gordon Ridgeway, Peter J. Maroulis
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Publication number: 20100120262Abstract: The present invention is a method to increase the intrinsic compressive stress in plasma enhanced chemical vapor deposition (PECVD) silicon nitride (SiN) and silicon carbonitride (SiCN) thin films, comprising depositing the film from an amino vinylsilane-based precursor. More specifically the present invention uses the amino vinylsilane-based precursor selected from the formula: [RR1N]xSiR3y(R2)z, where x+y+z=4, x=1-3, y=0-2, and z=1-3; R, R1 and R3 can be hydrogen, C1 to C10 alkane, alkene, or C4 to C12 aromatic; each R2 is a vinyl, allyl or vinyl-containing functional group.Type: ApplicationFiled: October 30, 2009Publication date: May 13, 2010Applicant: AIR PRODUCTS AND CHEMICALS, INC.Inventors: Vasil Vorsa, Andrew David Johnson, Manchao Xiao
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Publication number: 20080142046Abstract: A thermal process for cleaning equipment surfaces of undesired silicon nitride in semiconductor processing chamber with thermally activated source of pre-diluted fluorine is disclosed in the specification. The process comprising: (a)flowing pre-diluted fluorine in an inert gas through the chamber; (b)maintaining the chamber at an elevated temperature of 230° C. to 565° C. to thermally disassociate the fluorine; (c)cleaning undesired silicon nitride from the surfaces by chemical reaction of thermally disassociated fluorine in (b) with the undesired silicon nitride to form volatile reaction products; (d)removing the volatile reaction products from the chamber.Type: ApplicationFiled: December 13, 2006Publication date: June 19, 2008Inventors: Andrew David Johnson, Peter James Maroulis, Vasil Vorsa, Robert Gordon Ridgeway