Patents by Inventor Vasily Stanislavovich USATYUK

Vasily Stanislavovich USATYUK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11075651
    Abstract: Provided is a system and method for determining a generalized Low-Density Parity-Check (LDPC) code for forward error correction channel coding that has a repeat-accumulate code structure.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: July 27, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Vasily Stanislavovich Usatyuk, Nikita Andreevich Polianskii, Ilya Viktorovich Vorobyev, Vladimir Anatolyevich Gaev, German Viktorovich Svistunov, Mikhail Sergeevich Kamenev, Yulia Borisovna Kameneva
  • Patent number: 11057049
    Abstract: Provided is an encoder, a decoder, a computer-readable medium and methods of forward error correction channel encoding/decoding within a HARQ scheme, based on a generalized quasi-cyclic low-density parity-check code comprising a Cordaro-Wagner component code.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: July 6, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Vasily Stanislavovich Usatyuk, Nikita Andreevich Polianskii, Ilya Viktorovich Vorobyev, Vladimir Anatolyevich Gaev, German Viktorovich Svistunov, Mikhail Sergeevich Kamenev, Yulia Borisovna Kameneva
  • Patent number: 10944425
    Abstract: Devices and methods are disclosed for generating on the basis of a first protograph matrix P1 of size m×n, wherein the first protograph matrix P1 defines a first code H1, a second protograph matrix P2 of size (m+d)×(n+d), wherein the second protograph matrix P2 defines a second code H2. The device comprises a processor configured to: generate an auxiliary protograph matrix P? of size (m+d1)×(n+d1) on the basis of the first protograph matrix P1 using row splitting; generate d2 random integer numbers, wherein d2=d?d1; generate a binary matrix M of size d2×(n?m), wherein rows of the binary matrix M are generated on the basis of the d2 random integer numbers; generate a matrix M? by lifting the binary matrix M; Other operation steps are also included.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: March 9, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Vasily Stanislavovich Usatyuk, Nikita Andreevich Polianskii, Ilya Viktorovich Vorobyev
  • Patent number: 10931310
    Abstract: A method for quasi-cyclic low-density parity-check (QC-LDPC) encoding and decoding of a data packet by a lifted matrix is provided, the method comprising: lifting the QC-LDPC code for maximal code length Nmax and maximal circulant size Zupper of the base matrix; generating a plurality of optimal values ri for a plurality of circulants Z1, Z2, . . . , Zupper based on the QC-LDPC code lifted for maximal length Nmax, 0?ri?Zupper?1; saving the generated plurality of optimal values ri corresponding to the plurality of circulants Z1, Z2, . . . , Zupper and a matrix for the QC-LDPC code lifted for maximal length Nmax in the memory; receiving a current circulant Zcurrent from the plurality of circulants Z1, Z2, . . . , Zupper; selecting a current optimal value rcurrent from the plurality of optimal values ri stored in the memory corresponding to the current circulant Zcurrent; and lifting the base matrix based on the current optimal value rcurrent.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: February 23, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Vasily Stanislavovich Usatyuk, Ilya Viktorovich Vorobyev, Nikita Andreevich Polianskii, German Viktorovich Svistunov
  • Patent number: 10892848
    Abstract: The disclosure relates to devices and methods implementing polar codes. For instance, the disclosure relates to an an encoder for encoding data, wherein the encoder comprises a processor configured to encode the data using a (n, k, d) parent polar code C into codewords c0n-1=u0n-1A subject to the constraints u0n-1VT=0, wherein u0n-1 denotes the data, wherein A = ( 1 0 1 1 ) ? m , wherein F?m denotes the m-times Kronecker product of the matrix F with itself and wherein the constraint matrix V comprises in addition to the constraint matrix V0 of the parent polar code the constraint matrix V1 of a first helper code C1 and the constraint matrix V2 of a second helper code C2.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: January 12, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Oleg Feat'evich Kurmaev, Alexey Mikhailovich Razinkin, Vasily Stanislavovich Usatyuk
  • Patent number: 10784992
    Abstract: Encoding devices and methods, arranged to execute encoding, wherein an input vector for polar encoding is computed, wherein the input vector comprises a set of information bits and a set of frozen bits, and an intermediate codeword is generated by executing a polar encoding of the input vector. Further, punctured and shortened bits are removed from the intermediate codeword, to obtain a reduced intermediate codeword, and an output codeword is generated by applying a permutation operation on the reduced intermediate codeword. A sequence of extension bits is selected from the intermediate codeword bits and information bits, and modulated symbols are generated by applying bitmapping on the output codeword and on the sequence of extension bits.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: September 22, 2020
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Oleg Feat'evich Kurmaev, Alexey Mikhailovich Razinkin, Vasily Stanislavovich Usatyuk
  • Publication number: 20200220556
    Abstract: Provided is an encoder, a decoder, a computer-readable medium and methods of forward error correction channel encoding/decoding within a HARQ scheme, based on a generalized quasi-cyclic low-density parity-check code comprising a Cordaro-Wagner component code.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 9, 2020
    Inventors: Vasily Stanislavovich USATYUK, Nikita Andreevich POLIANSKII, Ilya Viktorovich VOROBYEV, Vladimir Anatolyevich GAEV, German Viktorovich SVISTUNOV, Mikhail Sergeevich KAMENEV, Yulia Borisovna KAMENEVA
  • Publication number: 20200153457
    Abstract: Provided is a system and method for determining a generalized LDPC code for forward error correction channel coding that has a repeat-accumulate code structure.
    Type: Application
    Filed: January 13, 2020
    Publication date: May 14, 2020
    Inventors: Vasily Stanislavovich USATYUK, Nikita Andreevich POLIANSKII, Ilya Viktorovich VOROBYEV, Vladimir Anatolyevich GAEV, German Viktorovich SVISTUNOV, Mikhail Sergeevich KAMENEV, Yulia Borisovna KAMENEVA
  • Publication number: 20190349003
    Abstract: Devices and methods are disclosed for generating on the basis of a first protograph matrix P1 of size m×n, wherein the first protograph matrix P1 defines a first code H1, a second protograph matrix P2 of size (m+d)×(n+d), wherein the second protograph matrix P2 defines a second code H2. The device comprises a processor configured to: generate an auxiliary protograph matrix P? of size (m+d1)×(n+d1) on the basis of the first protograph matrix P using row splitting; generate d2 random integer numbers, wherein d2=d?d1; generate a binary matrix M of size d2×(n?m), wherein rows of the binary matrix M are generated on the basis of the d2 random integer numbers; generate a matrix M? by lifting the binary matrix M; Other operation steps are also included.
    Type: Application
    Filed: June 13, 2019
    Publication date: November 14, 2019
    Inventors: Vasily Stanislavovich USATYUK, Nikita Andreevich POLIANSKII, Ilya Viktorovich VOROBYEV
  • Publication number: 20190273511
    Abstract: The invention relates to an apparatus for providing at least one parity check matrix defining a spatially-coupled low density parity check, LDPC, code on the basis of a set of base matrix parameters defining a plurality of base matrices, each base matrix of the plurality of base matrices being associated with a protograph of a plurality of protographs, wherein the apparatus comprises: a processor configured to: generate on the basis of the plurality of protographs a set of candidate protographs by discarding protographs of the plurality of protographs; lift the protographs of the set of candidate protographs for generating a plurality of codes; and generate on the basis of a plurality of codes a set of candidate codes by discarding codes of the plurality of codes.
    Type: Application
    Filed: May 21, 2019
    Publication date: September 5, 2019
    Inventor: Vasily Stanislavovich USATYUK
  • Publication number: 20190268021
    Abstract: A method for quasi-cyclic low-density parity-check (QC-LDPC) encoding and decoding of a data packet by a lifted matrix is provided, the method comprising: lifting the QC-LDPC code for maximal code length Nmax and maximal circulant size Zupper of the base matrix; generating a plurality of optimal values ri for a plurality of circulants Z1, Z2, . . . , Zupper based on the QC-LDPC code lifted for maximal length Nmax, 0?ri?Zupper?1; saving the generated plurality of optimal values ri corresponding to the plurality of circulants Z1, Z2, . . . , Zupper and a matrix for the QC-LDPC code lifted for maximal length Nmax in the memory; receiving a current circulant Zcurrent from the plurality of circulants Z1, Z2, . . . , Zupper; selecting a current optimal value rcurrent from the plurality of optimal values ri stored in the memory corresponding to the current circulant Zcurrent; and lifting the base matrix based on the current optimal value rcurrent.
    Type: Application
    Filed: May 14, 2019
    Publication date: August 29, 2019
    Inventors: Vasily Stanislavovich USATYUK, ILYA Viktorovich VOROBYEV, Nikita Andreevich POLIANSKII, German Viktorovich SVISTUNOV
  • Publication number: 20190158222
    Abstract: The present invention relates to a device and method, both arranged to execute encoding. According to the present invention, an input vector for polar encoding is computed, wherein the input vector comprises a set of information bits and a set of frozen bits, and an intermediate codeword is generated by executing a polar encoding of the input vector. Further, punctured and shortened bits are removed from the intermediate codeword, to obtain a reduced intermediate codeword, and an output codeword is generated by applying a permutation operation on the reduced intermediate codeword. A sequence of extension bits is selected from the intermediate codeword bits and information bits, and modulated symbols are generated by applying bitmapping on the output codeword and on the sequence of extension bits.
    Type: Application
    Filed: January 25, 2019
    Publication date: May 23, 2019
    Inventors: Oleg Feat'evich KURMAEV, Alexey Mikhailovich RAZINKIN, Vasily Stanislavovich USATYUK
  • Publication number: 20190081731
    Abstract: The disclosure relates to devices and methods implementing polar codes. For instance, the disclosure relates to an an encoder for encoding data, wherein the encoder comprises a processor configured to encode the data using a (n, k, d) parent polar code C into codewords c0n-1=u0n-1A subject to the constraints u0n-1VT=0, wherein u0n-1 denotes the data, wherein A = ( 1 0 1 1 ) ? m , wherein F?m denotes the m-times Kronecker product of the matrix F with itself and wherein the constraint matrix V comprises in addition to the constraint matrix V0 of the parent polar code the constraint matrix V1 of a first helper code C1 and the constraint matrix V2 of a second helper code C2.
    Type: Application
    Filed: November 9, 2018
    Publication date: March 14, 2019
    Inventors: Oleg Feat'evich KURMAEV, Alexey Mikhailovich RAZINKIN, Vasily Stanislavovich USATYUK