Abstract: An integrated circuit (IC) power distribution network is disclosed. In one aspect, the IC includes a stack of layers formed on a substrate. The IC includes standard cells with parallel gate structures oriented in a direction y. Each cell includes an internal power pin for supplying a reference voltage to the cell. The stack includes metal layers in which lines are formed to route signals between cells. The lines in each metal layer have a preferred orientation that is orthogonal to that of the lines in an adjacent metal layer. A first layer is the lowest metal layer that has y as a preferred orientation while also providing routing resources for signal routing between the cells. A second layer is the nearest metal layer above this first layer. The IC includes a power distribution network for delivering the reference voltage to the power pin.

Abstract: An integrated circuit (IC) power distribution network is disclosed. In one aspect, the IC includes a stack of layers formed on a substrate. The IC includes standard cells with parallel gate structures oriented in a direction y. Each cell includes an internal power pin for supplying a reference voltage to the cell. The stack includes metal layers in which lines are formed to route signals between cells. The lines in each metal layer have a preferred orientation that is orthogonal to that of the lines in an adjacent metal layer. A first layer is the lowest metal layer that has y as a preferred orientation while also providing routing resources for signal routing between the cells. A second layer is the nearest metal layer above this first layer. The IC includes a power distribution network for delivering the reference voltage to the power pin.