Abstract: In one embodiment, the invention is an apparatus. The apparatus includes comparison logic to compare received data values to an expected data value, producing a first result. The apparatus also includes combinatorial logic coupled to the comparison logic. The combinatorial logic is to use the first result to encode in a second result which path of a set of paths the received data should traverse. The apparatus also includes transfer logic coupled to the combinatorial logic. The transfer logic is to transfer the received data values to each of three paths using the second result.

Abstract: A switch circuit, system, and method are provided in which a single, shared data line is formed across the majority of the monolithic substrate which bears the switch. The shared data line is serviced by multiplexers and corresponding state machines placed near the ports of the switch. The state machine determines which one of a plurality of data streams received on the corresponding ports are to be serviced and placed in a first timeslot of multiple timeslots sent across the shared data path. A multiplexer select input responds to the state machine output by forwarding the selected data stream for a duration set by a timer within the state machine. An arbiter within the corresponding state machine determines which port is to served first and which data is to be placed in the first timeslot, but also can prioritize based on user-defined rules.

Abstract: An architecture and method for cyclical redundancy check (CRC) calculation and checking is disclosed. This architecture may include a CRC calculation function, a plurality of CRC nullification functions, and a multiplexer to select the output of one of the plurality of CRC nullification functions. The architecture may further comprise N-1 CRC nullification functions, where N is number bytes in the data bus.

Abstract: A method and apparatus for a multi-channel high speed framer is described. In one embodiment, the invention is an apparatus. The apparatus includes a first plurality of pipeline stages suitable for data framing between a link layer and a network interface. The apparatus also includes a first memory coupled to each pipeline stage of the first plurality of pipeline stages, the first memory to store context information at predetermined stage locations for each pipeline stage. The apparatus further includes a first control logic coupled to the first memory and to each pipeline stage of the first plurality of pipeline stages, the first control logic to control transfer of data between the first memory and the first plurality of pipeline stages. Within the apparatus, each stage of the first plurality of pipeline stages is suitable for loading the context information from the first memory through first control logic and performing a sub-function of data framing.