Abstract: In a communications data link network of the type having a plurality of ground stations and a single moving airborne station, there is provided a doppler frequency compensation circuit in each of the ground stations. The downlink carrier frequency is fixed and continuously broadcast to the receiving ground station which continuously receive the doppler shifted carrier signal. The ground stations are provided with coherent demodulators which provide a coherent I.F. recovered carrier signal that is applied to a scaling phase-locked loop to provide a deviation frequency signal that is applied to an inverting phase-locked loop which provides a pre-compensated uplink R.F. carrier signal. The uplink R.F. carrier signal has a compensated uplink doppler frequency component which equals the inverted and scaled doppler frequency of the received downlink carrier.

Abstract: In a demodulator circuit for receiving a direct sequence spread spectrum signal having composite PN codes, there is provided a novel detecting and tracking circuit for faster acquisition of the component PN codes. The first component code of the received composite direct sequence spread spectrum code is noncoherently detected in a noncoherent detection branch and the subsequent component codes of the composite code are automatically detected in a coherent lock detection branch to provide faster acquisition than was heretofore possible. Further, while the noncoherent detection branch is acquiring the first component PN code, a novel coherent carrier tracking loop is acquiring and locking onto the direct sequence spread spectrum signal carrier.

Abstract: Apparatus for generating a complex composite code for fast acquisition by multiple access users is provided which comprises a composite code generator having an in-phase channel code generator and a quadrature channel code generator for generating two linear composite codes. The quadrature channel composite code is modulated onto a carrier which is 90.degree. out of phase with the in-phase carrier. The two linear composite codes are summed together and simultaneously transmitted to the receivers. Each receiver has a plurality of components code generators which generate replica component codes for fast acquisition of the composite code. A plurality of the components codes of the in-phase composite code are derived from the like components code generators in the quadrature channel to enhance speed of acquisition without acknowledgements by the receivers that any of the components codes have been acquired.

Abstract: A fast acquisition coherent code tracking loop for use in direct sequence spread spectrum systems is provided with an embedded frequency offset loop. The frequency offset loop in the code tracking loop is provided with a pair of multipliers, one of which is coupled to the carrier tracking loop through a scaling circuit and the second multiplier is coupled to the output of the highly stable VCO of the carrier tracking loop to provide extremely fast phase acquisition of the received PN code and very high frequency stability of the code tracking loop.

Abstract: A multiple-loop microwave frequency synthesizer is provided with an upper and a lower phased-lock loop. The phased-lock loops are mutually connected to a novel sampling mixer and their outputs are connected to an up-converter for providing microwave frequency generated signals. The phased-lock loops are provided with a plurality of programmable frequency dividers connected to a processor controller to provide a wide range of adjustable frequencies up to 20 gigahertz at the output of the frequency synthesizer.

Abstract: A wide deviation tracking filter is provided which has the input signal to be tracked applied to a low frequency phase-locked loop circuit which performs coarse filtering of the phase noise on the input signal. A digital phase shifter is connected in series in the low frequency phase-locked loop and produces a pair of quadrature clock signals which are at the frequency of the input signal and at half the frequency of the output of the voltage control oscillator of the low frequency phase-locked loop. The pair of quadrature signals are connected to an image reject circuit. The image reject circuit is connected in series in the loop of a high frequency phase-locked loop which operates at a much higher frequency than the low frequency phase-locked loop and performs the function of further filtering the phase noise on the input signal to provide an output signal having ultra-low phase noise.

Abstract: An image reject apparatus for covering a broad range of signal systhesis frequencies is provided with a digital phase shifter having an input for receiving modulated signals at twice the desired output frequency. A modulator comprising a power divider having a radio frequency (RF) input, a pair of mixers coupled to the outputs of said digital phase shifter and to the outputs from said power divider provides mixer output signals which are combined to produce sum and difference product signals as desired side band signals.

Abstract: A long phase-locked loop circuit is provided which has an electronic closure circuit in series in the loop. The loop is effectively an open loop until acquisition of the incoming signal at which time the electronic closure circuit closes the phase-locked loop. A novel coincidence circuit is provided which compares the carrier in the loop with a reference frequency and when the two frequencies are equal the coincidence circuit closes the electronic closure circuit.